Architecture implications of high-speed I/O for distributed-memory computers

1994 ◽  
Author(s):  
Thomas Gross ◽  
Peter Steenkiste
Keyword(s):  
High Speed ◽  
Distributed Memory

scholarly journals LEVERAGING SHARED CACHES FOR PARALLEL TEMPORAL BLOCKING OF STENCIL CODES ON MULTICORE PROCESSORS AND CLUSTERS

2010 ◽  
Vol 20 (04) ◽  
pp. 359-376 ◽  
Author(s):  
MARKUS WITTMANN ◽  
GEORG HAGER ◽  
JAN TREIBIG ◽  
GERHARD WELLEIN
Keyword(s):  
High Speed ◽  
Distributed Memory ◽  
Multicore Processors ◽  
Memory Bandwidth ◽  
Performance Models ◽  
Shared Caches ◽  
Strong Scaling ◽  
Stencil Codes ◽  
Multicore Chips ◽  
Synthetic Modeling

Bandwidth-starved multicore chips have become ubiquitous. It is well known that the performance of stencil codes can be improved by temporal blocking, lessening the pressure on the memory interface. We introduce a new pipelined approach that makes explicit use of shared caches in multicore environments and minimizes synchronization and boundary overhead. Benchmark results are presented for three current x86-based microprocessors, showing clearly that our optimization works best on designs with high-speed shared caches and low memory bandwidth per core. We furthermore demonstrate that simple bandwidth-based performance models are inaccurate for this kind of algorithm and employ a more elaborate, synthetic modeling procedure. Finally we show that temporal blocking can be employed successfully in a hybrid shared/distributed-memory environment, albeit with limited benefit at strong scaling.

A Push-Based Prefetching for Remote Caching RAM Grid

2009 ◽  
Vol 1 (4) ◽  
pp. 1-15
Author(s):  
Rui Chu ◽  
Nong Xiao ◽  
Xicheng Lu
Keyword(s):  
Distributed Computing ◽  
Grid Computing ◽  
High Speed ◽  
Distributed Memory ◽  
Pattern Mining ◽  
Memory Access ◽  
Remote Memory ◽  
Network Communication ◽  
Computing Technique ◽  
Memory Resources

As an innovative grid computing technique for sharing the distributed memory resources in a high-speed widearea network, RAM Grid exploits the distributed computing nodes, and provides remote memory for the user nodes which are short of memory. The performance of RAM Grid is constrained with the expensive network communication cost. In order to hide the latency of remote memory access and improve the performance, the authors proposed the push-based prefetching to enable the memory providers to push the potential useful pages to the user nodes. For each provider, it employs sequential pattern mining techniques, which adapts to the characteristics of memory page access sequences, on locating useful memory pages for prefetching. They have verified the effectiveness of the proposed method through trace-driven simulations.

A Push-Based Prefetching for Remote Caching RAM Grid

2012 ◽  
pp. 487-501
Author(s):  
Rui Chu ◽  
Nong Xiao ◽  
Xicheng Lu
Keyword(s):  
High Speed ◽  
Distributed Memory ◽  
Pattern Mining ◽  
Communication Cost ◽  
Memory Access ◽  
Remote Memory ◽  
Area Network ◽  
Wide Area Network ◽  
Computing Technique ◽  
Memory Resources

As an innovative grid computing technique for sharing the distributed memory resources in a high-speed wide-area network, RAM Grid exploits the distributed computing nodes, and provides remote memory for the user nodes which are short of memory. The performance of RAM Grid is constrained with the expensive network communication cost. In order to hide the latency of remote memory access and improve the performance, the authors proposed the push-based prefetching to enable the memory providers to push the potential useful pages to the user nodes. For each provider, it employs sequential pattern mining techniques, which adapts to the characteristics of memory page access sequences, on locating useful memory pages for prefetching. They have verified the effectiveness of the proposed method through trace-driven simulations.

High speed vision processor with reconfigurable processing element array based on full-custom distributed memory

2016 ◽  
Vol 55 (4S) ◽  
pp. 04EF08
Author(s):  
Zhe Chen ◽  
Jie Yang ◽  
Cong Shi ◽  
Qi Qin ◽  
Liyuan Liu ◽  
...  
Keyword(s):  
High Speed ◽  
Distributed Memory ◽  
Processing Element ◽  
Reconfigurable Processing ◽  
Element Array

Architecture and evaluation of a high-speed networking subsystem for distributed-memory systems

1994 ◽  
Vol 22 (2) ◽  
pp. 154-163
Author(s):  
P. Steenkiste ◽  
M. Hemy ◽  
T. Mummert ◽  
B. Zill
Keyword(s):  
High Speed ◽  
Distributed Memory ◽  
Memory Systems

Microfabrication research at the National Submicron Facility

1983 ◽  
Vol 41 ◽  
pp. 86-89
Author(s):  
E.D. Wolf
Keyword(s):  
Integrated Circuits ◽  
Particle Physics ◽  
High Speed ◽  
New Technology ◽  
High Energy ◽  
High Energy Particle ◽  
New Science ◽  
Wide Range ◽  
Intermediate Domain ◽  
Circuit Function

Most microelectronics devices and circuits operate faster, consume less power, execute more functions and cost less per circuit function when the feature-sizes internal to the devices and circuits are made smaller. This is part of the stimulus for the Very High-Speed Integrated Circuits (VHSIC) program. There is also a need for smaller, more sensitive sensors in a wide range of disciplines that includes electrochemistry, neurophysiology and ultra-high pressure solid state research. There is often fundamental new science (and sometimes new technology) to be revealed (and used) when a basic parameter such as size is extended to new dimensions, as is evident at the two extremes of smallness and largeness, high energy particle physics and cosmology, respectively. However, there is also a very important intermediate domain of size that spans from the diameter of a small cluster of atoms up to near one micrometer which may also have just as profound effects on society as “big” physics.

Vacuum System to Minimize the Specimen Contamination of High-Performance EM

1977 ◽  
Vol 35 ◽  
pp. 68-69
Author(s):  
N. Yoshimura ◽  
K. Shirota ◽  
T. Etoh
Keyword(s):  
Electron Microscope ◽  
High Speed ◽  
High Performance ◽  
High Vacuum ◽  
Vacuum System ◽  
Pump System ◽  
Pumping System ◽  
Diffusion Pump ◽  
Almost All ◽  
Cascade Type

One of the most important requirements for a high-performance EM, especially an analytical EM using a fine beam probe, is to prevent specimen contamination by providing a clean high vacuum in the vicinity of the specimen. However, in almost all commercial EMs, the pressure in the vicinity of the specimen under observation is usually more than ten times higher than the pressure measured at the punping line. The EM column inevitably requires the use of greased Viton O-rings for fine movement, and specimens and films need to be exchanged frequently and several attachments may also be exchanged. For these reasons, a high speed pumping system, as well as a clean vacuum system, is now required. A newly developed electron microscope, the JEM-100CX features clean high vacuum in the vicinity of the specimen, realized by the use of a CASCADE type diffusion pump system which has been essentially improved over its predeces- sorD employed on the JEM-100C.

The on-line use of histogram data for high-speed correction and alignment of electron microscope images

1984 ◽  
Vol 42 ◽  
pp. 556-557
Author(s):  
William Krakow
Keyword(s):  
Power Spectrum ◽  
High Speed ◽  
Direct Memory Access ◽  
Digital Television ◽  
Contrast Transfer Function ◽  
The Past ◽  
High Resolution Tem ◽  
On Line ◽  
Correction Of Astigmatism ◽  
The Fourier Transform

In the past few years on-line digital television frame store devices coupled to computers have been employed to attempt to measure the microscope parameters of defocus and astigmatism. The ultimate goal of such tasks is to fully adjust the operating parameters of the microscope and obtain an optimum image for viewing in terms of its information content. The initial approach to this problem, for high resolution TEM imaging, was to obtain the power spectrum from the Fourier transform of an image, find the contrast transfer function oscillation maxima, and subsequently correct the image. This technique requires a fast computer, a direct memory access device and even an array processor to accomplish these tasks on limited size arrays in a few seconds per image. It is not clear that the power spectrum could be used for more than defocus correction since the correction of astigmatism is a formidable problem of pattern recognition.

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