scholarly journals An Empirical Investigation on System and Statement Level Parallelism Strategies for Accelerating Scatter Search Using Handel-C and Impulse-C

VLSI Design ◽  
2012 ◽  
Vol 2012 ◽  
pp. 1-11
Author(s):  
M. Walton ◽  
O. Ahmed ◽  
G. Grewal ◽  
S. Areibi
Keyword(s):  
Optimization Problems ◽  
Scatter Search ◽  
Population Based ◽  
Field Programmable ◽  
Speed Up ◽  
Time Required ◽  
High Level ◽  
Level Parallelism ◽  
Code Optimizations ◽  
Established Population

Scatter Search is an effective and established population-based metaheuristic that has been used to solve a variety of hard optimization problems. However, the time required to find high-quality solutions can become prohibitive as problem sizes grow. In this paper, we present a hardware implementation of Scatter Search on a field-programmable gate array (FPGA). Our objective is to improve the run time of Scatter Search by exploiting the potentially massive performance benefits that are available through the native parallelism in hardware. When implementing Scatter Search we employ two different high-level languages (HLLs): Handel-C and Impulse-C. Our empirical results show that by effectively exploiting source-code optimizations, data parallelism, and pipelining, a 28x speed up over software can be achieved.

Implementation of FFT on General-Purpose Architectures for FPGA

2012 ◽  
pp. 658-676
Author(s):  
Fabio Garzia ◽  
Roberto Airoldi ◽  
Jari Nurmi
Keyword(s):  
General Purpose ◽  
Reference Architecture ◽  
Processor Core ◽  
General Purpose Processor ◽  
Programmable Architecture ◽  
Reconfigurable Array ◽  
Field Programmable ◽  
Speed Up ◽  
On Chip ◽  
High Level

This paper describes two general-purpose architectures targeted to Field Programmable Gate Array (FPGA) implementation. The first architecture is based on the coupling of a coarse-grain reconfigurable array with a general-purpose processor core. The second architecture is a homogeneous multi-processor system-on-chip (MP-SoC). Both architectures have been mapped onto two different Altera FPGA devices, a StratixII and a StratixIV. Although mapping onto the StratixIV results in higher operating frequencies, the capabilities of the device are not fully exploited. The implementation of a FFT on the two platforms shows a considerable speed-up in comparison with a single-processor reference architecture. The speed-up is higher in the reconfigurable solution but the MP-SoC provides an easier programming interface that is completely based on C language. The authors’ approach proves that implementing a programmable architecture on FPGA and then programming it using a high-level software language is a viable alternative to designing a dedicated hardware block with a hardware description language (HDL) and mapping it on FPGA.

scholarly journals FPGA–Based Efficient Hardware/Software Co–Design for Industrial Systems with Consideration of Output Selection

2016 ◽  
Vol 67 (3) ◽  
pp. 150-159 ◽  
Author(s):  
Kyriakos M. Deliparaschos ◽  
Konstantinos Michail ◽  
Argyrios C. Zolotas ◽  
Spyros G. Tzafestas
Keyword(s):  
System Modeling ◽  
Robustness Analysis ◽  
Sensor Selection ◽  
Linear Quadratic ◽  
Industrial Systems ◽  
Field Programmable ◽  
Speed Up ◽  
Hardware Description ◽  
Selection Framework ◽  
High Level

Abstract This work presents a field programmable gate array (FPGA)-based embedded software platform coupled with a software-based plant, forming a hardware-in-the-loop (HIL) that is used to validate a systematic sensor selection framework. The systematic sensor selection framework combines multi-objective optimization, linear-quadratic-Gaussian (LQG)-type control, and the nonlinear model of a maglev suspension. A robustness analysis of the closed-loop is followed (prior to implementation) supporting the appropriateness of the solution under parametric variation. The analysis also shows that quantization is robust under different controller gains. While the LQG controller is implemented on an FPGA, the physical process is realized in a high-level system modeling environment. FPGA technology enables rapid evaluation of the algorithms and test designs under realistic scenarios avoiding heavy time penalty associated with hardware description language (HDL) simulators. The HIL technique facilitates significant speed-up in the required execution time when compared to its software-based counterpart model.

Implementation of FFT on General-Purpose Architectures for FPGA

2012 ◽  
pp. 156-175
Author(s):  
Fabio Garzia ◽  
Roberto Airoldi ◽  
Jari Nurmi
Keyword(s):  
General Purpose ◽  
Reference Architecture ◽  
Processor Core ◽  
General Purpose Processor ◽  
Programmable Architecture ◽  
Reconfigurable Array ◽  
Field Programmable ◽  
Speed Up ◽  
On Chip ◽  
High Level

This paper describes two general-purpose architectures targeted to Field Programmable Gate Array (FPGA) implementation. The first architecture is based on the coupling of a coarse-grain reconfigurable array with a general-purpose processor core. The second architecture is a homogeneous multi-processor system-on-chip (MP-SoC). Both architectures have been mapped onto two different Altera FPGA devices, a StratixII and a StratixIV. Although mapping onto the StratixIV results in higher operating frequencies, the capabilities of the device are not fully exploited. The implementation of a FFT on the two platforms shows a considerable speed-up in comparison with a single-processor reference architecture. The speed-up is higher in the reconfigurable solution but the MP-SoC provides an easier programming interface that is completely based on C language. The authors’ approach proves that implementing a programmable architecture on FPGA and then programming it using a high-level software language is a viable alternative to designing a dedicated hardware block with a hardware description language (HDL) and mapping it on FPGA.

Metaheuristics in Data Mining

2011 ◽  
pp. 1200-1206
Author(s):  
Miguel García Torres
Keyword(s):  
Neural Networks ◽  
Genetic Algorithms ◽  
High Performance ◽  
Optimization Problems ◽  
Scatter Search ◽  
Optimization Methods ◽  
Population Based ◽  
Variable Neighbourhood Search ◽  
Neighbourhood Search ◽  
Distribution Algorithms

The Metaheuristics are general strategies for designing heuristic procedures with high performance. The term metaheuristic, which appeared in 1986 for the first time (Glover, 1986), is compound by the terms: “meta”, that means over or behind, and “heuristic”. Heuristic is the qualifying used for methods of solving optimization problems that are obtained from the intuition, expertise or general knowledge (Michalewicz & Fogel, 2000). Nowadays a lot of known strategies can be classified as metaheuristics and there are a clear increasing number of research papers and applications that use this kind of methods. Several optimization methods that already existed when the term appeared have been later interpreted as metaheuristics (Glover & Kochenberger, 2003). Genetic Algorithms, Neural Networks, Local Searches, and Simulated Annealing are some of those classical metaheuristics. Several modern metaheuristics have succeeded in solving relevant optimization problems in industry, business and engineering. The most relevant among them are Tabu Search, Variable Neighbourhood Search and GRASP. New population based evolutionary metaheuristics such as Scatter Search and Estimation Distribution Algorithms are also quite important. Besides Neural Networks and Genetic Algorithms, other nature-inspired metaheuristics such as Ant Colony Optimization and Particle Swarm Optimization are also now well known metaheuristics.

Implementation of FFT on General-Purpose Architectures for FPGA

2010 ◽  
Vol 1 (3) ◽  
pp. 24-43
Author(s):  
Fabio Garzia ◽  
Roberto Airoldi ◽  
Jari Nurmi
Keyword(s):  
General Purpose ◽  
Reference Architecture ◽  
Processor Core ◽  
General Purpose Processor ◽  
Programmable Architecture ◽  
Field Programmable ◽  
Speed Up ◽  
Hardware Description ◽  
On Chip ◽  
High Level

This paper describes two general-purpose architectures targeted to Field Programmable Gate Array (FPGA) implementation. The first architecture is based on the coupling of a coarse-grain reconfigurable array with a general-purpose processor core. The second architecture is a homogeneous multi-processor system-on-chip (MP-SoC). Both architectures have been mapped onto two different Altera FPGA devices, a StratixII and a StratixIV. Although mapping onto the StratixIV results in higher operating frequencies, the capabilities of the device are not fully exploited. The implementation of a FFT on the two platforms shows a considerable speed-up in comparison with a single-processor reference architecture. The speed-up is higher in the reconfigurable solution but the MP-SoC provides an easier programming interface that is completely based on C language. The authors’ approach proves that implementing a programmable architecture on FPGA and then programming it using a high-level software language is a viable alternative to designing a dedicated hardware block with a hardware description language (HDL) and mapping it on FPGA.

Comparison of Meta-heuristic Algorithms on Benchmark Functions

2019 ◽  
Vol 2 (3) ◽  
pp. 508-517
Author(s):  
FerdaNur Arıcı ◽  
Ersin Kaya
Keyword(s):  
Heuristic Algorithms ◽  
Optimization Problems ◽  
Search Algorithm ◽  
Optimization Algorithms ◽  
Gravitational Search Algorithm ◽  
Differential Evolution Algorithm ◽  
Population Based ◽  
Time Interval ◽  
Bee Colony ◽  
Different Characteristics

Optimization is a process to search the most suitable solution for a problem within an acceptable time interval. The algorithms that solve the optimization problems are called as optimization algorithms. In the literature, there are many optimization algorithms with different characteristics. The optimization algorithms can exhibit different behaviors depending on the size, characteristics and complexity of the optimization problem. In this study, six well-known population based optimization algorithms (artificial algae algorithm - AAA, artificial bee colony algorithm - ABC, differential evolution algorithm - DE, genetic algorithm - GA, gravitational search algorithm - GSA and particle swarm optimization - PSO) were used. These six algorithms were performed on the CEC’17 test functions. According to the experimental results, the algorithms were compared and performances of the algorithms were evaluated.

scholarly journals GMBO: Group Mean-Based Optimizer for Solving Various Optimization Problems

Mathematics ◽  
2021 ◽  
Vol 9 (11) ◽  
pp. 1190
Author(s):  
Mohammad Dehghani ◽  
Zeinab Montazeri ◽  
Štěpán Hubálovský
Keyword(s):  
Optimization Algorithm ◽  
Optimization Problems ◽  
Search Algorithm ◽  
Random Search ◽  
Optimization Algorithms ◽  
Gravitational Search Algorithm ◽  
Main Idea ◽  
Population Based ◽  
Grey Wolf Optimizer ◽  
Whale Optimization

There are many optimization problems in the different disciplines of science that must be solved using the appropriate method. Population-based optimization algorithms are one of the most efficient ways to solve various optimization problems. Population-based optimization algorithms are able to provide appropriate solutions to optimization problems based on a random search of the problem-solving space without the need for gradient and derivative information. In this paper, a new optimization algorithm called the Group Mean-Based Optimizer (GMBO) is presented; it can be applied to solve optimization problems in various fields of science. The main idea in designing the GMBO is to use more effectively the information of different members of the algorithm population based on two selected groups, with the titles of the good group and the bad group. Two new composite members are obtained by averaging each of these groups, which are used to update the population members. The various stages of the GMBO are described and mathematically modeled with the aim of being used to solve optimization problems. The performance of the GMBO in providing a suitable quasi-optimal solution on a set of 23 standard objective functions of different types of unimodal, high-dimensional multimodal, and fixed-dimensional multimodal is evaluated. In addition, the optimization results obtained from the proposed GMBO were compared with eight other widely used optimization algorithms, including the Marine Predators Algorithm (MPA), the Tunicate Swarm Algorithm (TSA), the Whale Optimization Algorithm (WOA), the Grey Wolf Optimizer (GWO), Teaching–Learning-Based Optimization (TLBO), the Gravitational Search Algorithm (GSA), Particle Swarm Optimization (PSO), and the Genetic Algorithm (GA). The optimization results indicated the acceptable performance of the proposed GMBO, and, based on the analysis and comparison of the results, it was determined that the GMBO is superior and much more competitive than the other eight algorithms.

scholarly journals High-Level Parallel Ant Colony Optimization with Algorithmic Skeletons

2021 ◽  
Author(s):  
Breno A. de Melo Menezes ◽  
Nina Herrmann ◽  
Herbert Kuchen ◽  
Fernando Buarque de Lima Neto
Keyword(s):  
Ant Colony Optimization ◽  
High Performance ◽  
Optimization Problems ◽  
Programming Model ◽  
Parallel Implementation ◽  
Ant Colony ◽  
Algorithmic Skeletons ◽  
Low Level ◽  
Programming Patterns ◽  
High Level

AbstractParallel implementations of swarm intelligence algorithms such as the ant colony optimization (ACO) have been widely used to shorten the execution time when solving complex optimization problems. When aiming for a GPU environment, developing efficient parallel versions of such algorithms using CUDA can be a difficult and error-prone task even for experienced programmers. To overcome this issue, the parallel programming model of Algorithmic Skeletons simplifies parallel programs by abstracting from low-level features. This is realized by defining common programming patterns (e.g. map, fold and zip) that later on will be converted to efficient parallel code. In this paper, we show how algorithmic skeletons formulated in the domain specific language Musket can cope with the development of a parallel implementation of ACO and how that compares to a low-level implementation. Our experimental results show that Musket suits the development of ACO. Besides making it easier for the programmer to deal with the parallelization aspects, Musket generates high performance code with similar execution times when compared to low-level implementations.

scholarly journals Smart sensing metasurface with self-defined functions in dual polarizations

Nanophotonics ◽  
2020 ◽  
Vol 9 (10) ◽  
pp. 3271-3278 ◽  
Author(s):  
Qian Ma ◽  
Qiao Ru Hong ◽  
Xin Xin Gao ◽  
Hong Bo Jing ◽  
Che Liu ◽  
...  
Keyword(s):  
Field Programmable Gate Array ◽  
The Other ◽  
Rf Power ◽  
Pin Diodes ◽  
Self Recognition ◽  
Field Programmable ◽  
Power Detector ◽  
Smart Sensing ◽  
High Level ◽  
Rf Power Detector

AbstractFor the intelligence of metamaterials, the -sensing mechanism and programmable reaction units are two important components for self-recognition and -determination. However, their realization still face great challenges. Here, we propose a smart sensing metasurface to achieve self-defined functions in the framework of digital coding metamaterials. A sensing unit that can simultaneously process the sensing channel and realize phase-programmable capability is designed by integrating radio frequency (RF) power detector and PIN diodes. Four sensing units distributed on the metasurface aperture can detect the microwave incidences in the x- and y-polarizations, while the other elements can modulate the reflected phase patterns under the control of a field programmable gate array (FPGA). To validate the performance, three schemes containing six coding patterns are presented and simulated, after which two of them are measured, showing good agreements with designs. We envision that this work may motivate studies on smart metamaterials with high-level recognition and manipulation.

Inverse Association Between Health Literacy and Obesity Among Children in Greece: A School-Based, Cross-Sectional Epidemiological Study

2021 ◽  
pp. 109019812098294
Author(s):  
Aikaterini Kanellopoulou ◽  
Venetia Notara ◽  
George Antonogeorgos ◽  
Maria Chrissini ◽  
Andrea Paola Rojas-Gil ◽  
...  
Keyword(s):  
Health Literacy ◽  
Weight Status ◽  
Dietary Habits ◽  
Population Based ◽  
Activity Levels ◽  
Inverse Association ◽  
Linear Regression Models ◽  
Cross Sectional ◽  
Body Weight Status ◽  
High Level

Children’s health literacy is a crucial pillar of health. This study is aimed to examine the association between health literacy and weight status among Greek schoolchildren aged 10 to 12 years old. A population-based, cross-sectional observational study enrolling 1,728 students (795 boys), aged 10 to 12 years old, was conducted during school years 2014–2016. A health literacy index (range 0-100) was created through an item response theory hybrid model, by combining a variety of beliefs and perceptions of children about health. The mean health literacy score was 70.4 (±18.7). The majority of children (63.8%) had a “high” level (i.e., >67/100) of health literacy, 30.5% had a “medium” level (i.e., 34–66/100) of health literacy, while a small proportion of children (5.7%) had a “low” level (i.e., <33/100). Girls exhibited a higher level of health literacy than boys (71.7 ± 18.3 vs. 68.8 ± 19.1, p < .01). Regarding body weight status, 21.7% of children was overweight and 5.0% was obese. Linear regression models showed that the health literacy score was inversely associated with children’s body mass index (regression coefficient [95% CI]: −0.010 [−0.018, −0.001]), after adjusting for dietary habits, physical activity levels, and other potential confounders. Health literacy seems to be a dominant characteristic of children’s weight status; therefore, school planning, as well as public health policy actions should emphasize on the ability of children’s capacity to obtain, process, and understand basic health information.

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