scholarly journals Message Broadcasting via a New Fault Tolerant Irregular Advance Omega Network in Faulty and Nonfaulty Network Environments

2013 ◽  
Vol 2013 ◽  
pp. 1-16 ◽  
Author(s):  
Ved Prakash Bhardwaj ◽  
Nitin
Keyword(s):  
Fault Tolerant ◽  
Interconnection Network ◽  
High Reliability ◽  
Low Cost ◽  
Routing Algorithm ◽  
Multiple Faults ◽  
Message Broadcasting ◽  
Double Switch ◽  
Better Than

Interconnection Network (IN) is a key element for all parallel processing applications. Multistage Interconnection Network (MIN) is an efficient IN for these applications, as it has the quality of excellent performance at low cost with high reliability. MINs are effective medium for message broadcasting. Doing the same task in faulty situations is a critical challenge. In this paper, we have presented a new Fault Tolerant Interconnection Network named as Irregular Advance Omega Network (IAON); also we have presented its routing algorithm. IAON is the modified form of Advance Omega Network. The proposed MIN can endure multiple faults and provides a suitable path between every source to every destination. We have examined the fault tolerance capacity of IAON and compared its performance with other existing MINs. In order to check the performance of proposed MIN, message broadcasting was performed in three conditions as follows: (1) when network was fault free; (2) when network was Single Switch Faulty in every stage; (3) when network was Double Switch Faulty in every stage. Results showed that IAON performed better than the earlier proposed MINs.

scholarly journals Crack Restraining Methods and their Effects on the Microstructures and Properties of Laser Cladded WC/Fe Coatings

Materials ◽  
2018 ◽  
Vol 11 (12) ◽  
pp. 2541 ◽  
Author(s):  
Qiu-Lian Dai ◽  
Can-bin Luo ◽  
Fang-yi You
Keyword(s):  
Wear Resistance ◽  
Laser Cladding ◽  
Low Cost ◽  
Annealing Treatment ◽  
Melting Process ◽  
Laser Cladding Process ◽  
Process Heat ◽  
Crack Susceptibility ◽  
Better Than

Laser cladded WC/Fe coatings have the advantages of low cost and high abrasion wear resistance. However, cracks always appear in WC/Fe coatings, which limits their industrial application. In this paper, the co-effects of the re-melting process, heat treatments, and amount of Co element on the cracking susceptibility, microstructures, and mechanical properties of WC/Fe laser cladding coatings were studied. Experimental results show that re-melting process is helpful to improve the surface quality of the coating and to reduce the cracking susceptibility. The hardness of the coating decreases slightly but distributes more uniformly. Cracks in the coating can be inhibited effectively by preheating the substrate to 250 °C and maintaining the temperature during the laser cladding process, as well as applying an annealing treatment at 300 °C for 1 h. Heat treatment also results in a slight decrease in the hardness. Crack initiation cannot be restrained completely by applying the above two methods when laser cladding a big area of coating. On the basis of the above two methods, addition of Co element to the coating can further improve its toughness and decrease the crack susceptibility. Crack-free WC/Fe coating can be manufactured when 8% Co is added, and its wear resistance is much better than that of the hardened medium steel, especially when the wear time is long.

THE CUBE-OF-RINGS INTERCONNECTION NETWORK

1998 ◽  
Vol 09 (01) ◽  
pp. 25-37 ◽  
Author(s):  
THOMAS J. CORTINA ◽  
ZHIWEI XU
Keyword(s):  
Graph Theory ◽  
Interconnection Networks ◽  
Fault Tolerant ◽  
Interconnection Network ◽  
Routing Algorithm ◽  
Parallel Computers ◽  
Closed Form Expression ◽  
Form Expression ◽  
Graph Theoretic ◽  
Basic Graph

We present a family of interconnection networks named the Cube-Of-Rings (COR) networks along with their basic graph-theoretic properties. Aspects of group graph theory are used to show the COR networks are symmetric and optimally fault tolerant. We present a closed-form expression of the diameter and optimal one-to-one routing algorithm for any member of the COR family. We also discuss the suitability of the COR networks as the interconnection network of scalable parallel computers.

scholarly journals Quality of Dried Anchovy (Stolephorus sp.) from Buru Island Produced by Using Closed Sun Dryer

2018 ◽  
Vol 21 (3) ◽  
pp. 543
Author(s):  
Imelda Krisanta Enda Savitri ◽  
Bernita Silaban ◽  
R.B.D. Sormin
Keyword(s):  
Traditional Method ◽  
Low Cost ◽  
National Standard ◽  
Plate Count ◽  
Drying Method ◽  
Vibrio Cholera ◽  
E Coli ◽  
Total Plate Count ◽  
Better Than

Anchovies drying method in Saliong, Batuboi village, Kayeli Bay has been done by spreading fish on the ground covered by mat or net due to low cost and easy to apply. However, there are no guarantee in the sanitation and hygienic. The objective of this research was to study the effect of closed sun drying method on the quality of dried anchovies (Stolephorus sp). The method was using closed cabinet sun dryer prototype covered by transparence plastic multi racks. Parameters observed involve: organoleptic, moisture content, acid insoluble, total plate count (TPC), E. coli, Salmonella sp., Vibrio cholera and fungi according to Indonesian national standard reference (SNI). The result showed the dried anchovy have an organoleptic grade refers to appearance, smells and texture were 8.40, 8.33 and 8.27 respectively. Moreover, moisture 17.50%; acid insoluble ash 0.32%; total bacterial (TPC) 6.92x102; E. coli, Salmonella sp., V. cholera and fungi were negative. For comparison, dried anchovy produced by using conventional/traditional drying had an organoleptic grade refers to appearance, smells and texture were 7.67, 7.73 dan 7.87 respectively; while moisture 16.93% ; acid insoluble ash 0.65%; total bacterial (TPC) 1.16 x103; E. coli, Salmonella sp., V. cholera and fungi were negative. According to the SNI 01-2891 BSN 1992, dried anchovy produced by using enclosed sun dryer better than dried anchovy produced by traditional method.

scholarly journals Dynamic Fault-Tolerant Workflow Scheduling with Hybrid Spatial-Temporal Re-Execution in Clouds

Information ◽  
2019 ◽  
Vol 10 (5) ◽  
pp. 169 ◽  
Author(s):  
Na Wu ◽  
Decheng Zuo ◽  
Zhan Zhang
Keyword(s):  
Large Scale ◽  
Fault Tolerant ◽  
Critical Path ◽  
High Reliability ◽  
Low Cost ◽  
Cost Effective ◽  
Scientific Workflow ◽  
Workflow Scheduling ◽  
Workflow Execution ◽  
Computing Environments

Improving reliability is one of the major concerns of scientific workflow scheduling in clouds. The ever-growing computational complexity and data size of workflows present challenges to fault-tolerant workflow scheduling. Therefore, it is essential to design a cost-effective fault-tolerant scheduling approach for large-scale workflows. In this paper, we propose a dynamic fault-tolerant workflow scheduling (DFTWS) approach with hybrid spatial and temporal re-execution schemes. First, DFTWS calculates the time attributes of tasks and identifies the critical path of workflow in advance. Then, DFTWS assigns appropriate virtual machine (VM) for each task according to the task urgency and budget quota in the phase of initial resource allocation. Finally, DFTWS performs online scheduling, which makes real-time fault-tolerant decisions based on failure type and task criticality throughout workflow execution. The proposed algorithm is evaluated on real-world workflows. Furthermore, the factors that affect the performance of DFTWS are analyzed. The experimental results demonstrate that DFTWS achieves a trade-off between high reliability and low cost objectives in cloud computing environments.

scholarly journals A Fault-Tolerant Routing Algorithm for Wireless Sensor Networks Based on the Structured Directional de Bruijn Graph

2016 ◽  
Vol 16 (2) ◽  
pp. 46-59 ◽  
Author(s):  
Chuiwei Lu ◽  
Defa Hu
Keyword(s):  
Fault Tolerant ◽  
Low Cost ◽  
Routing Algorithm ◽  
Routing Algorithms ◽  
Wireless Sensor ◽  
De Bruijn Graph ◽  
Malicious Nodes ◽  
Routing Table ◽  
Topology Information ◽  
De Bruijn

Abstract Wireless Sensor Network (WSNs) nodes with low energy, run out of energy easily and stop working, which results then in routing failures and communication blocking. The paper puts forward a FTRSDDB algorithm based on the structured directional de Bruijn graph to enhance the performance of faulttolerant routing for WSNs. The algorithm randomly deploys some super nodes with abundant energy and powerful performance in WSNs. These nodes are responsible for the collection of topology information from the WSNs to build redundant routing table, and provide data forwarding and routing update service for popular nodes. The FTRSDDB algorithm optimizes network topology structure using de Bruijn graph, and can quickly find neighbor nodes failure and invalid routing path, and then calculate new routing information with low cost, which greatly improves the performance of fault-tolerant routing of WSNs. Experiments show that the FTRSDDB algorithm takes on better performance compared with other faulttolerant routing algorithms, even that exist malicious nodes attack in the WSNs.

scholarly journals Low cost fault-tolerant routing algorithm for Networks-on-Chip

2015 ◽  
Vol 39 (6) ◽  
pp. 358-372 ◽  
Author(s):  
Junxiu Liu ◽  
Jim Harkin ◽  
Yuhua Li ◽  
Liam Maguire
Keyword(s):  
Fault Tolerant ◽  
Low Cost ◽  
Routing Algorithm ◽  
Networks On Chip ◽  
On Chip

A novel design layout of three disjoint paths multistage interconnection network & its reliability analysis

2021 ◽  
Vol 17 (4) ◽  
pp. 390-403
Author(s):  
Vipin Sharma ◽  
Abdul Q. Ansari ◽  
Rajesh Mishra
Keyword(s):  
Fault Tolerance ◽  
Interconnection Networks ◽  
Interconnection Network ◽  
High Reliability ◽  
Block Diagram ◽  
Low Cost ◽  
Disjoint Paths ◽  
Content Type ◽  
Multistage Interconnection Network ◽  
Terminal Reliability

Purpose The purpose of this paper is to design a efficient layout of Multistage interconnection network which has cost effective solution with high reliability and fault-tolerence capability. For parallel computation, various multistage interconnection networks (MINs) have been discussed hitherto in the literature, however, these networks always required further improvement in reliability and fault-tolerance capability. The fault-tolerance capability of the network can be achieved by increasing the number of disjoint paths as a result the reliability of the interconnection networks is also improved. Design/methodology/approach This proposed design is a modification of gamma interconnection network (GIN) and three disjoint path gamma interconnection network (3-DGIN). It has a total seven number of paths for all tag values which is uniform out of these seven paths, three paths are disjoint paths which increase the fault tolerance capability by two faults. Due to the presence of more paths than the GIN and 3-DGIN, this proposed design is more reliable. Findings In this study, a new design layout of a MIN has been proposed which provides three disjoint paths and uniformity in terms of an equal number of paths for all source-destination (S-D) pairs. The new layout contains fewer nodes as compared to GIN and 3-DGIN. This design provides a symmetrical structure, low cost, better terminal reliability and provides an equal number of paths for all tag values (|S-D|) when compared with existing MINs of this class. Originality/value A new design layout of MINs has been purposed and its two terminal reliability is calculated with the help of the reliability block diagram technique.

scholarly journals NoCGuard: A Reliable Network-on-Chip Router Architecture

Electronics ◽  
2020 ◽  
Vol 9 (2) ◽  
pp. 342 ◽  
Author(s):  
Muhammad Akmal Shafique ◽  
Naveed Khan Baloch ◽  
Muhammad Iram Baig ◽  
Fawad Hussain ◽  
Yousaf Bin Zikria ◽  
...  
Keyword(s):  
Network Architecture ◽  
Fault Tolerant ◽  
Channel Allocation ◽  
High Reliability ◽  
Low Cost ◽  
Network On Chip ◽  
Time To Failure ◽  
Protection Factor ◽  
Router Architecture ◽  
On Chip

Aggressive scaling in deep nanometer technology enables chip multiprocessor design facilitated by the communication-centric architecture provided by Network-on-Chip (NoC). At the same time, it brings considerable challenges in reliability because a fault in the network architecture severely impacts the performance of a system. To deal with these reliability challenges, this research proposed NoCGuard, a reconfigurable architecture designed to tolerate multiple permanent faults in each pipeline stage of the generic router. NoCGuard router architecture uses four highly reliable and low-cost fault-tolerant strategies. We exploited resource borrowing and double routing strategy for the routing computation stage, default winner strategy for the virtual channel allocation stage, runtime arbiter selection and default winner strategy for the switch allocation stage and multiple secondary bypass paths strategy for the crossbar stage. Unlike existing reliable router architectures, our architecture features less redundancy, more fault tolerance, and high reliability. Reliability comparison using Mean Time to Failure (MTTF) metric shows 5.53-time improvement in a lifetime and using Silicon Protection Factor (SPF), 22-time improvement, which is better than state-of-the-art reliable router architectures. Synthesis results using 15 nm and 45 nm technology library show that additional circuitry incurs an area overhead of 28.7% and 28% respectively. Latency analysis using synthetic, PARSEC and SPLASH-2 traffic shows minor increase in performance by 3.41%, 12% and 15% respectively while providing high reliability.

A new architecture for online error detection and isolation in network on chip

2020 ◽  
Vol 26 (4) ◽  
pp. 307-323
Author(s):  
Chakib Nehnouh
Keyword(s):  
Error Detection ◽  
Fault Tolerant ◽  
High Reliability ◽  
Low Cost ◽  
Network On Chip ◽  
Fault Detection And Isolation ◽  
Main Concern ◽  
Transient Faults ◽  
Protection Factor ◽  
On Chip

The Network-on-Chip (NoC) has become a promising communication infrastructure for Multiprocessors-System-on-Chip (MPSoC). Reliability is a main concern in NoC and performance is degraded when NoC is susceptible to faults. A fault can be determined as a cause of deviation from the desired operation of the system (error). To deal with these reliability challenges, this work propose OFDIM (Online Fault Detection and Isolation Mechanism),a novel combined methodology to tolerate multiple permanent and transient faults. The new router architecture uses two modules to assure highly reliable and low-cost fault-tolerant strategy. In contrast to existing works, our architecture presents less area, more fault tolerance, and high reliability. The reliability comparison using Silicon Protection Factor (SPF), shows 22-time improvement and that additional circuitry incurs an area overhead of 27%, which is better than state-of-the-art reliable router architectures. Also, the results show that the throughput decreases only by 5.19% and minor increase in average latency 2.40% while providing high reliability.

Sign in / Sign up

Export Citation Format

Share Document