scholarly journals Low-Voltage Complex Filters Using Current Feedback Operational Amplifiers

2013 ◽  
Vol 2013 ◽  
pp. 1-7 ◽  
Author(s):  
Panagiotis Samiotis ◽  
Costas Psychalinos
Keyword(s):  
Low Voltage ◽  
Operational Amplifiers ◽  
Cmos Process ◽  
Current Feedback ◽  
Mos Transistor ◽  
Low Voltage Operation ◽  
Current Feedback Operational Amplifiers ◽  
Novel Complex ◽  
Simulation Results ◽  
Frequency Behavior

A novel complex filter topology realized using current feedback operational amplifiers as active elements is introduced in this paper. Offered benefits are the low-voltage operation capability and the requirement for employing only grounded passive elements. Two application examples are provided, where the frequency behavior of the derived filters fulfills the ZigBee and Bluetooth standards, respectively. Their performance evaluation has been done through simulation results at postlayout level, using MOS transistor models provided by AMS C35B4 CMOS process.

ACTIVE CIRCULATOR CIRCUITS USING OA, CCII, CFOA AND DVCC

2009 ◽  
Vol 18 (04) ◽  
pp. 629-645 ◽  
Author(s):  
AHMED M. SOLIMAN
Keyword(s):  
Detailed Comparison ◽  
Current Conveyor ◽  
Operational Amplifiers ◽  
Current Conveyors ◽  
Spice Simulation ◽  
Current Feedback ◽  
Current Feedback Operational Amplifiers ◽  
Different Types ◽  
Simulation Results ◽  
Differential Voltage Current Conveyor

A review of the two types of circulators using Operational Amplifiers (OA) with detailed comparison is given. Novel active circulator circuits using Current Conveyors (CCII) and Current Feedback Operational Amplifiers (CFOA) and Differential Voltage Current Conveyor (DVCC) are introduced. The proposed CCII circulator circuit uses six CCIIs and three floating resistors. Two different circulator types using the CFOA are given. A circulator circuit which uses three DVCCs and has the advantage of using three grounded resistors is also introduced. Spice simulation results using 0.5 μm CMOS transistors are included to support the theoretical analysis and demonstrate comparisons among the different types of circulators.

A Low-Voltage Bulk-Driven Differential CMOS Schmitt Trigger with Tunable Hysteresis

2019 ◽  
Vol 28 (07) ◽  
pp. 1920004 ◽  
Author(s):  
Ali Nejati ◽  
Yasin Bastan ◽  
Parviz Amiri ◽  
Mohammad Hossein Maghami
Keyword(s):  
Low Voltage ◽  
Supply Voltage ◽  
Schmitt Trigger ◽  
Noise Removal ◽  
Cmos Process ◽  
Current Feedback ◽  
Silicon Area ◽  
Hysteresis Width ◽  
Common Mode Voltage ◽  
Simulation Results

This paper describes a low-voltage bulk-driven differential CMOS Schmitt trigger with tunable hysteresis for use in noise removal applications. The hysteresis of the proposed Schmitt trigger is designed based on a regenerative current feedback and its width is adjustable by two control voltages. The center of the hysteresis can also be adjusted by either the control voltages or input common-mode voltage. The principle operation of the proposed circuit is discussed, its main formulas are derived and its performance is verified by Cadence post-layout simulations. Designed in the TSMC 0.18[Formula: see text][Formula: see text]m standard CMOS process, the circuit consumes [Formula: see text]m2 of silicon area. Post-layout simulation results indicate that the hysteresis width of the Schmitt trigger can be adjusted from 170 to 270[Formula: see text]mV and the ratio of the hysteresis width variation to supply voltage is 11.11%. Operated with 0.8[Formula: see text]V supply voltage, the power consumption of the circuit ranges from 0.48 to 1.12[Formula: see text]mW.

A 10T Cell Design without Half Select Problem for Bit-Interleaving Architecture in 65nm CMOS

2013 ◽  
Vol 373-375 ◽  
pp. 1607-1611
Author(s):  
Hong Gang Zhou ◽  
Shou Biao Tan ◽  
Qiang Song ◽  
Chun Yu Peng
Keyword(s):  
Error Correction ◽  
Low Voltage ◽  
Cmos Technology ◽  
Soft Error ◽  
Error Correction Codes ◽  
Cell Design ◽  
Low Voltage Operation ◽  
Sram Cell ◽  
Simulation Results ◽  
Nanometer Regime

With the scaling of process technologies into the nanometer regime, multiple-bit soft error problem becomes more serious. In order to improve the reliability and yield of SRAM, bit-interleaving architecture which integrated with error correction codes (ECC) is commonly used. However, this leads to the half select problem, which involves two aspects: the half select disturb and the additional power caused by half-selected cells. In this paper, we propose a new 10T cell to allow the bit-interleaving array while completely eliminating the half select problem, thus allowing low-power and low-voltage operation. In addition, the RSNM and WM of our proposed 10T cell are improved by 21% and nearly one times, respectively, as compared to the conventional 6T SRAM cell in SMIC 65nm CMOS technology. We also conduct a comparison with the conventional 6T cell about the leakage simulation results, which show 14% of leakage saving in the proposed 10T cell.

VARIOUS CURRENT-MODE AND VOLTAGE-MODE INSTRUMENTATION AMPLIFIER TOPOLOGIES SUITABLE FOR INTEGRATION

2010 ◽  
Vol 19 (03) ◽  
pp. 689-699 ◽  
Author(s):  
ERKAN YUCE
Keyword(s):  
Integrated Circuit ◽  
Experimental Tests ◽  
Current Mode ◽  
The Other ◽  
Operational Amplifiers ◽  
Instrumentation Amplifier ◽  
Nmos Transistor ◽  
Current Feedback ◽  
Voltage Mode ◽  
Current Feedback Operational Amplifiers

In this paper, four instrumentation amplifier (IA) topologies, one of which is current-mode (CM) while the others are voltage-mode (VM), are presented. Three of the IAs use one to two current feedback operational amplifiers (CFOAs) while the other one employs only a single NMOS transistor. One of the IA circuits, given as an example, is simple while others are novel. The CM IA is composed of only grounded resistors which have some advantages in integrated circuit (IC) process. Non-ideality effects such as non-ideal gain and parasitic impedances on the performance of introduced IAs are discussed. In order to show the performance of the circuits, we perform experimental tests and simulations by using SPICE program.

scholarly journals CFOA-Based New Structure of Fractional Order Inverse Filters

2020 ◽  
Vol 8 (5) ◽  
pp. 4501-4504
Keyword(s):  
Stability Analysis ◽  
Fractional Order ◽  
Operational Amplifiers ◽  
Inverse Filter ◽  
Current Feedback ◽  
Current Feedback Operational Amplifiers ◽  
Low Pass ◽  
Band Pass ◽  
High Pass

This paper presents a CFOA-based fractional order inverse filter (FOIF) structure. Proposed structure utilizes two current feedback operational amplifiers (CFOAs), two fractional capacitors (FCs) and two resistors to design FOIFs to realize fractional order inverse low pass (FOILP), fractional order inverse high pass (FOIHP) and fractional order inverse band pass (FOIBP) responses. The proposed configuration of FOIFs is simulated in PSPICE using AD844 type CFOAs. Stability analysis and MATLAB simulations are also carried out to authenticate the theoretical propositions.

Sign in / Sign up

Export Citation Format

Share Document