scholarly journals Modified digital space vector pulse width modulation realization on low-cost FPGA platform with optimization for 3-phase voltage source inverter

2021 ◽  
Vol 11 (4) ◽  
pp. 3629
Author(s):  
Shalini Vashishtha ◽  
Rekha K. R.
Keyword(s):  
Pulse Width ◽  
Pulse Width Modulation ◽  
Switching Time ◽  
Low Cost ◽  
Voltage Source ◽  
Total Power ◽  
Space Vector ◽  
Chip Area ◽  
Digital Space ◽  
Generation Unit

The realization of power electronic applications on hardware is a challenging task. The digital control circuit strategies are used to overcome the analog control strategies by providing great flexibility with simple equipment and higher switching frequencies. In this manuscript, an area optimized, modified digital space vector (DSV) pulse width modulation is designed and realized on low-cost FPGA. The modified digital space vector pulse width modulation (DSVPWM) uses a phase-locked loop (PLL) to generate clocks using the digital clock manager (DCM). These DCM clocks are used in the DSVPWM module to synchronize the other sub-modules. The voltage generation unit generates the three-phase (3-Ф) voltages and is used in the alpha-beta generation and sector determination unit. The reference active vectors are made by the reference generation unit and used in switching time calculation. The PWM pulses are generated using switching time generation, and lastly, the dead time occurrence unit generates the final SVPWM gate pulses. The modified DSVPWM is synthesized and implemented on Spartan-3E FPGA. The modified DSVPWM utilizes 17% slices, works at 102.45 MHz, and consumes 0.070 W total power. The simulation results and the resource utilization of modified DSVPWM are represented in detail. The modified DSVPWM is compared with existing PWM approaches on different Spartan-series FPGAs with better chip area improvement

scholarly journals Amplitude Sampled Reference-Based Space Vector Pulse Width Modulation for Control of Voltage Source Converters

2021 ◽  
pp. 46-63
Author(s):  
Mohamed K. Ratib ◽  
Ahmed Rashwan
Keyword(s):  
Pulse Width ◽  
Pulse Width Modulation ◽  
Power Converters ◽  
Low Cost ◽  
Harmonic Distortion ◽  
Industrial Applications ◽  
Control Technique ◽  
Voltage Source ◽  
Voltage Source Converter ◽  
Space Vector

Memory, speed, reliability, and efficiency are the main characteristics of concern in new contemporary control techniques of electric power converters. Space vector pulse width modulation (SVPWM) is a widespread digital compute-intensive control technique used in the control of power converters. This study aims to overcome the large number of calculations needed by the SVPWM algorithm, which limits its implementation in many advanced industrial applications. This paper presents a low-cost software implemented simplified SVPWM technique. The proposed strategy generates the inverter switching times in a straightforward manner with no need for complicated and time-consuming sector identification and look-up switching tables. A simulation study has been done using MATLAB/SIMULINK environment for the three-phase voltage source converter (VSC). The results in terms of total harmonic distortion (THD) in the converter line voltage are compared for the proposed technique, conventional SVPWM, and space pulse width modulation (SPWM). The execution time is reduced considerably with a slight increase in the value of THD and about 14.4 percent DC-link voltage utilization over the SPWM.

Synchronized Symmetrical Bus-Clamping PWM Strategies for Three Level Inverter: Applications to Low Switching Frequencies

2011 ◽  
Vol 12 (2) ◽  
Author(s):  
Sreenivasappa Bhupasandra Veeranna ◽  
Udaykumar R Yaragatti ◽  
Abdul R Beig
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
High Performance ◽  
Pulse Width Modulation ◽  
Industrial Applications ◽  
Voltage Source ◽  
Switching Frequency ◽  
Space Vector ◽  
Digital Implementation ◽  
Switching Losses

The digital control of three-level voltage source inverter fed high power high performance ac drives has recently become a popular in industrial applications. In order to control such drives, the pulse width modulation algorithm needs to be implemented in the controller. In this paper, synchronized symmetrical bus-clamping pulse width modulation strategies are presented. These strategies have some practical advantages such as reduced average switching frequency, easy digital implementation, reduced switching losses and improved output voltage quality compared to conventional space vector pulse width modulation strategies. The operation of three level inverter in linear region is extended to overmodulation region. The performance is analyzed in terms THD and fundamental output voltage waveforms and is compared with conventional space vector PWM strategies and found that switching losses can be minimized using bus-clamping strategy compared to conventional space vector strategy. The proposed method is implemented using Motorola Power PC 8240 processor and verified on a constant v/f induction motor drive fed from IGBT based inverter.

scholarly journals Design and implement of pulse width modulation with low-cost hardware in the loop

2020 ◽  
Vol 11 (2) ◽  
pp. 870
Author(s):  
Qasim Al Azze ◽  
Mohammed Hasan Ali
Keyword(s):  
Pulse Width ◽  
Pulse Width Modulation ◽  
Low Cost ◽  
Voltage Source ◽  
Hardware In The Loop ◽  
Matlab Simulation ◽  
Output Current ◽  
Voltage Waveform ◽  
Sinusoidal Pulse Width Modulation ◽  
Three Phases

<p>The paper presents a low-cost hardware in the loop based on Arduino. Sinusoidal Pulse Width Modulation (SPWM) designing, analyzing, and implementation is experimented as hardware in the loop. Sinusoidal Pulse Width Modulation implementation via MATLAB\Simulation demonstrates in this work. In this paper, Arduino Mega2560 platform, microcontroller, introduce as hardware. A comparative study of the both techniques is presented. Arduino interfaces with PC Target MATLAB environment. Three phases Voltage Source Inverter directs by the generated pulses that loads with three phases RLC. The obtaining output current and voltage waveform of RLC load of Hardware-in-the-Loop validates to the MATLAB\simulation output waveform. The compering shows the output waveforms are primarily having the same pattern. Arduino consider as the lost cost as microcontroller which could be used in real application.</p>

scholarly journals Virtual Space Vector Pulse Width Modulation for Asymmetric T-Type Neutral Point Clamped 3-Level Inverter

2021 ◽  
Vol 2021 ◽  
pp. 1-19
Author(s):  
Nam Xuan Doan ◽  
Nho Van Nguyen
Keyword(s):  
Pulse Width ◽  
Pulse Width Modulation ◽  
Low Cost ◽  
Comparative Investigation ◽  
Neutral Point ◽  
Virtual Space ◽  
Vector Diagram ◽  
Space Vector ◽  
Output Performance ◽  
Obvious Benefit

This paper proposes a novel 3-phase asymmetric 3-level T-type NPC inverter and studies its PWM performance using a virtual space vector pulse width modulation control strategy. Firstly, the mathematical model and characteristics of this economical topology are described. Then, a virtual space vector approach is proposed to build a space vector diagram for designing SVPWM control. Similar to the conventional 3-level NPC inverter, the asymmetric inverter can also work with the neutral point voltage self-balancing in a fundamental period, which enables employment of this topology in various applications. Finally, simulation and experiment results under different load conditions have shown good output performance of the asymmetric 3-level topology. Similar tests are also performed on both conventional 2-level and 3-level inverters for comparison. For an almost similar number of different voltage vectors in the space vector diagram, the asymmetric 3-level topology can compete with conventional 3-level inverters for low-cost applications. The obvious benefit of the asymmetric 3-level inverter is a smaller number of switches devices while it can achieve output performance similar to that of the conventional 3-level. The comparative investigation also shows that the total loss given by SVPWM for the asymmetric 3-level configuration is lower than that of the traditional 3-level inverter.

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