An Encyclopedia Coverage of Compiler’s, Programmer’s & Simulator’s for 8051, PIC, AVR, ARM, Arduino Embedded Technologies

Author(s):  
Anand Nayyar

<h2><span lang="EN-GB">In today’s world, everything from small needle to airplane engineering is surrounded by embedded systems. Embedded System technology not only lays foundation for development but is also acting as Backbone for mankind in almost in every area of science, engineering, research and daily living. The world of embedded systems is mainly surrounded by: Microcontrollers and Microprocessor’s. To work in the area of Embedded Systems design and development is both interesting and challenging- Interesting in the sense, as everything is getting intelligent, advanced and feature rich day by day and the embedded system’s field is progressing by leaps and bounds. But challenging in the way, that resources are very limited in terms of design and implementation. The most important crucial challenges nowadays in front of embedded system engineers are- <strong><span style="text-decoration: underline;">Which programmer to Use</span></strong>? <strong><span style="text-decoration: underline;">Which compiler to use for source code development</span></strong>? <strong><span style="text-decoration: underline;">Which simulator to use to simulate the overall behavior of system</span></strong>? As every compiler, programmer and simulator has distinct features, so selecting the best one as per one’s requirement has always remained a challenge. The main aim of this research paper is to overcome that difficulty by providing the researchers and embedded system engineers an encyclopedic platform of compilers, programmers and simulators for all sorts of embedded system technologies like 8051, PIC, ARM, AVR and Arduino so that choosing of the best platform in terms of compiler, programmer and simulator can become easy and time saving for everyone working in this area.</span></h2>

Author(s):  
Lisane Brisolara de Brisolara ◽  
Marcio Eduardo Kreutz ◽  
Luigi Carro

This chapter covers the use of UML as a modeling language for embedded systems design. It introduces the UML language, presenting the history of its definition, its main diagrams and characteristics. Using a case study, we show that using the standard UML with its limitations one is not able to model many important characteristics of embedded systems. For that reason, UML provides extension mechanisms that enable one to extend the language for a given domain, through the definition of profiles covering domain-specific applications. Several profiles have been proposed for the embedded systems domain, and some of those that have been standardized by OMG are presented here. A case study is also used to present MARTE, a new profile specifically proposed for the embedded system domain, enabling designers to model aspects like performance and schedulability. This chapter also presents a discussion about the effort to generate code from UML diagrams and analyses the open issues to the successful use of UML in the whole embedded system design flow.


2020 ◽  
Vol 10 (3) ◽  
pp. 22
Author(s):  
Andy D. Pimentel

As modern embedded systems are becoming more and more ubiquitous and interconnected, they attract a world-wide attention of attackers and the security aspect is more important than ever during the design of those systems. Moreover, given the ever-increasing complexity of the applications that run on these systems, it becomes increasingly difficult to meet all security criteria. While extra-functional design objectives such as performance and power/energy consumption are typically taken into account already during the very early stages of embedded systems design, system security is still mostly considered as an afterthought. That is, security is usually not regarded in the process of (early) design-space exploration of embedded systems, which is the critical process of multi-objective optimization that aims at optimizing the extra-functional behavior of a design. This position paper argues for the development of techniques for quantifying the ’degree of secureness’ of embedded system design instances such that these can be incorporated in a multi-objective optimization process. Such technology would allow for the optimization of security aspects of embedded systems during the earliest design phases as well as for studying the trade-offs between security and the other design objectives such as performance, power consumption and cost.


Author(s):  
AZIS WISNU WIDHI NUGRAHA ◽  
IMRON ROSYADI ◽  
FAHMI KHOERULLATIF

ABSTRAKDevOps mendorong percepatan pengembangan sistem. Namun bukti nyata penerapannya pada sistem tertanam belum mencukupi. Salah satu penyebabnya adalah kesulitan proses deployment pada perangkat. Konsep IoT menghubungkan sistem tertanam dengan jaringan yang memungkinkan proses pembaharuan firmware menggunakan mekanisme Over The Air (OTA). Tulisan ini mengusulkan infrastruktur DevOps untuk pengembangan sistem tertanam. Perangkat keras yang digunakan adalah microcontroller ESP8266. Sedangkan lingkungan DevOps menggunakan perangkat lunak PlatformIO, GitHub dan Travis CI. Pengujian dilakukan dengan mengubah user requirement yang kemudian diterapkan pada perangkat keras. Tahapan DevOps (build and test, release hingga deploy) telah berhasil dilakukan secara otomatis. Sistem mampu mendeteksi kesalahan penulisan kode sumber. Rerata waktu keseluruhan proses adalah 77,21 detik. Proses build and test mendominasi waktu proses dengan rerata sebesar 77,21 detik dan waktu deploy memiliki rerata 1,41 detik.Kata kunci: IoT, Sistem Tertanam, OTA, DevOps, ESP8266 ABSTRACTDevOps drives the acceleration of system development. However, the concrete evidence of its application in embedded systems is not sufficient. One of the causes is difficulty in the deployment process on the device. Firmware update using an Over-The-Air (OTA) mechanism is allowed by the IoT concept that connects embedded systems into a network. This paper is proposing a DevOps infrastructure for embedded system development. Proposed infrastructure using ESP8266 for the hardware and PlatformIO, GitHub, and Travis CI for the DevOps environment. Testing the proposed system is done by changing the user requirements that are applied to the hardware. The DevOps stages from building and test, release, and deployment have automatically been done. The system is also able to detect developer errors in writing source code. The average time of the whole process on trial was 77.21 seconds. The build and test process dominates the processing time with an average of 77.21 seconds and the deployment time is relatively short with an average of 1.41 seconds.Keywords: IoT, Embedded System, OTA, DevOps, ESP8266


Author(s):  
Anikó Costa ◽  
Paulo E. S. Barbosa ◽  
Filipe Moutinho ◽  
Fernando Pereira ◽  
Franklin Ramalho ◽  
...  

Model-based development for embedded system design has been used to accommodate the increase in system’s complexity. Several modeling formalisms proved to be well matched for usage within this area. The goal of this chapter is to present a model-based development methodology for embedded systems design. One of the main aims of this methodology is to contribute for usage of Petri nets as a system specification language within model-based development of embedded systems integrating MDA (Model-Driven Architecture) proposals as a reference for the development flow. Distributed execution of the initial developed platform-independent models is achieved through model partitioning into platform-specific sub-modules. System model decomposition is obtained through a net splitting operation. Two types of implementation platforms are considered: compliant and non-compliant with zero time delay for communication between modules (in other words, compliant or not with synchronous paradigm). Using a model-checking framework, properties associated to the execution of the distributed models in both types of platforms are compared with the execution of the initial model.


2010 ◽  
Vol 164 ◽  
pp. 227-232 ◽  
Author(s):  
Egidijus Kazanavicius ◽  
Vygintas Kazanavicius ◽  
Laura Ostaseviciute

Embedded computing systems still remain one of the underlying priorities in worldwide research communities. This paper presents an agent-based approach for embedded real-time systems design based on a reusable framework. The essence of our work lies on smart environment domain. Jade - a Java-based middleware is selected as a platform, facilitating the development of multi-agent embedded systems framework. Generic system architecture, framework prototype implementation and, subsequently, smart refrigerator control application are demonstrated, reasoning that the proposed method is effective in dealing with challenges raised by issues in contemporary embedded system development.


10.28945/3391 ◽  
2009 ◽  
Author(s):  
Moshe Pelleh

In our world, where most systems become embedded systems, the approach of designing embedded systems is still frequently similar to the approach of designing organic systems (or not embedded systems). An organic system, like a personal computer or a work station, must be able to run any task submitted to it at any time (with certain constrains depending on the machine). Consequently, it must have a sophisticated general purpose Operating System (OS) to schedule, dispatch, maintain and monitor the tasks and assist them in special cases (particularly communication and synchronization between them and with external devices). These OSs require an overhead on the memory, on the cache and on the run time. Moreover, generally they are task oriented rather than machine oriented; therefore the processor's throughput is penalized. On the other hand, an embedded system, like an Anti-lock Braking System (ABS), executes always the same software application. Frequently it is a small or medium size system, or made up of several such systems. Many small or medium size embedded systems, with limited number of tasks, can be scheduled by our proposed hardware architecture, based on the Motorola 500MHz MPC7410 processor, enhancing its throughput and avoiding the software OS overhead, complexity, maintenance and price. Encouraged by our experimental results, we shall develop a compiler to assist our method. In the meantime we will present here our proposal and the experimental results.


Electronics ◽  
2020 ◽  
Vol 10 (1) ◽  
pp. 13
Author(s):  
Balaji M ◽  
Chandrasekaran M ◽  
Vaithiyanathan Dhandapani

A Novel Rail-Network Hardware with simulation facilities is presented in this paper. The hardware is designed to facilitate the learning of application-oriented, logical, real-time programming in an embedded system environment. The platform enables the creation of multiple unique programming scenarios with variability in complexity without any hardware changes. Prior experimental hardware comes with static programming facilities that focus the students’ learning on hardware features and programming basics, leaving them ill-equipped to take up practical applications with more real-time constraints. This hardware complements and completes their learning to help them program real-world embedded systems. The hardware uses LEDs to simulate the movement of trains in a network. The network has train stations, intersections and parking slots where the train movements can be controlled by using a 16-bit Renesas RL78/G13 microcontroller. Additionally, simulating facilities are provided to enable the students to navigate the trains by manual controls using switches and indicators. This helps them get an easy understanding of train navigation functions before taking up programming. The students start with simple tasks and gradually progress to more complicated ones with real-time constraints, on their own. During training, students’ learning outcomes are evaluated by obtaining their feedback and conducting a test at the end to measure their knowledge acquisition during the training. Students’ Knowledge Enhancement Index is originated to measure the knowledge acquired by the students. It is observed that 87% of students have successfully enhanced their knowledge undergoing training with this rail-network simulator.


Sensors ◽  
2021 ◽  
Vol 21 (4) ◽  
pp. 1031
Author(s):  
Joseba Gorospe ◽  
Rubén Mulero ◽  
Olatz Arbelaitz ◽  
Javier Muguerza ◽  
Miguel Ángel Antón

Deep learning techniques are being increasingly used in the scientific community as a consequence of the high computational capacity of current systems and the increase in the amount of data available as a result of the digitalisation of society in general and the industrial world in particular. In addition, the immersion of the field of edge computing, which focuses on integrating artificial intelligence as close as possible to the client, makes it possible to implement systems that act in real time without the need to transfer all of the data to centralised servers. The combination of these two concepts can lead to systems with the capacity to make correct decisions and act based on them immediately and in situ. Despite this, the low capacity of embedded systems greatly hinders this integration, so the possibility of being able to integrate them into a wide range of micro-controllers can be a great advantage. This paper contributes with the generation of an environment based on Mbed OS and TensorFlow Lite to be embedded in any general purpose embedded system, allowing the introduction of deep learning architectures. The experiments herein prove that the proposed system is competitive if compared to other commercial systems.


Electronics ◽  
2020 ◽  
Vol 10 (1) ◽  
pp. 34
Author(s):  
Michele Alessandrini ◽  
Giorgio Biagetti ◽  
Paolo Crippa ◽  
Laura Falaschetti ◽  
Lorenzo Manoni ◽  
...  

Singular value decomposition (SVD) is a central mathematical tool for several emerging applications in embedded systems, such as multiple-input multiple-output (MIMO) systems, data analytics, sparse representation of signals. Since SVD algorithms reduce to solve an eigenvalue problem, that is computationally expensive, both specific hardware solutions and parallel implementations have been proposed to overcome this bottleneck. However, as those solutions require additional hardware resources that are not in general available in embedded systems, optimized algorithms are demanded in this context. The aim of this paper is to present an efficient implementation of the SVD algorithm on ARM Cortex-M. To this end, we proceed to (i) present a comprehensive treatment of the most common algorithms for SVD, providing a fairly complete and deep overview of these algorithms, with a common notation, (ii) implement them on an ARM Cortex-M4F microcontroller, in order to develop a library suitable for embedded systems without an operating system, (iii) find, through a comparative study of the proposed SVD algorithms, the best implementation suitable for a low-resource bare-metal embedded system, (iv) show a practical application to Kalman filtering of an inertial measurement unit (IMU), as an example of how SVD can improve the accuracy of existing algorithms and of its usefulness on a such low-resources system. All these contributions can be used as guidelines for embedded system designers. Regarding the second point, the chosen algorithms have been implemented on ARM Cortex-M4F microcontrollers with very limited hardware resources with respect to more advanced CPUs. Several experiments have been conducted to select which algorithms guarantee the best performance in terms of speed, accuracy and energy consumption.


Electronics ◽  
2021 ◽  
Vol 10 (4) ◽  
pp. 469
Author(s):  
Hyun Woo Oh ◽  
Ji Kwang Kim ◽  
Gwan Beom Hwang ◽  
Seung Eun Lee

Recently, advances in technology have enabled embedded systems to be adopted for a variety of applications. Some of these applications require real-time 2D graphics processing running on limited design specifications such as low power consumption and a small area. In order to satisfy such conditions, including a specific 2D graphics accelerator in the embedded system is an effective method. This method reduces the workload of the processor in the embedded system by exploiting the accelerator. The accelerator assists the system to perform 2D graphics processing in real-time. Therefore, a variety of applications that require 2D graphics processing can be implemented with an embedded processor. In this paper, we present a 2D graphics accelerator for tiny embedded systems. The accelerator includes an optimized line-drawing operation based on Bresenham’s algorithm. The optimized operation enables the accelerator to deal with various kinds of 2D graphics processing and to perform the line-drawing instead of the system processor. Moreover, the accelerator also distributes the workload of the processor core by removing the need for the core to access the frame buffer memory. We measure the performance of the accelerator by implementing the processor, including the accelerator, on a field-programmable gate array (FPGA), and ascertaining the possibility of realization by synthesizing using the 180 nm CMOS process.


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