A Study on the Optimization of Deep-Trench Super Junction Metal Oxide Semiconductor Field-Effect Transistor

2021 ◽  
Vol 16 (5) ◽  
pp. 781-785
Author(s):  
Yoon-Young Huh ◽  
Jong-Mun Choi ◽  
Jung-Min Kim ◽  
Ey-Goo Kang ◽  
Hun-Suk Chung

Power metal oxide semiconductor field-effect transistor is a switching device designed to handle large power consumption; it enables fast switching, resulting in low power consumption. Power devices are used as important components that determine the operation and performance of electrically powered products such as home appliances, smartphones, and automobiles. Power devices must be able to block high voltage so that current does not flow in the off state, have no power consumption in the on state, and have a small resistance so that high current can flow. For high efficiency, power loss must be minimized and resistance must be reduced during the turn-on state. To increase the breakdown voltage, the thickness and resistivity of the N-drift region must be increased. However, owing to the trade-off relationship, as the breakdown voltage increases, the on-resistance also increases. The super junction structure was proposed to improve this trade-off relationship. In this study, a process simulation using TCAD tool was carried out. Similar to the multi-epitaxial process, the P-pillar was divided into several layers, and the value of each concentration was specified. Thus, the charge balance of the pillar regions was achieved. For the maximum breakdown voltage characteristics and minimum on-resistance characteristics of the deep-trench super junction MOSFET, an experiment was conducted to optimize the cell pitch and pillar of the super junction MOSFET using a five-deep trench.

2013 ◽  
Vol 740-742 ◽  
pp. 925-928 ◽  
Author(s):  
Satoru Akiyama ◽  
Haruka Shimizu ◽  
Natsuki Yokoyama ◽  
Tomohiro Tamaki ◽  
Sadayuki Koido ◽  
...  

A hybrid silicon-carbide junction-gate field-effect transistor (HJT: hybrid JFET) is proposed. The HJT consists of a silicon-carbide (SiC) normally-on vertical JFET and a low-voltage normally-off silicon metal-oxide-semiconductor field-effect transistor (Si-MOS: silicon MOSFET). These two devices are connected by bonding wire as a cascode circuit [1] and packaged in a TO-3P split-lead-frame package with the same pin arrangement as conventional silicon power devices, which can thus be easily replaced by the proposed HJT. The vertical JFET has a steep-junction deep-trench structure in its channel region. This structure gives a low on-state resistance of under 60 mΩ and breakdown voltage of over 600 V with the die size of 6.25 mm2. Since the deep-trench structure also lowers the cutoff voltage of the JFET, required minimum breakdown voltage of the Si-MOS is reduced and on-state resistance of the Si-MOS is lowered. The HJT demonstrated on-state resistance of 69 mΩ and breakdown voltage of 783 V. These results indicate that the proposed HJT is a strong candidate for low-resistance high-power switching devices.


2015 ◽  
Vol 821-823 ◽  
pp. 660-666 ◽  
Author(s):  
Mario Saggio ◽  
Alfio Guarnera ◽  
Edoardo Zanetti ◽  
Simone Rascunà ◽  
Alessia Frazzetto ◽  
...  

Silicon Carbide metal-oxide-semiconductor field effect transistor (4H-SiC MOSFET) can be considered as the next revolution in power electronics applications. However, a wide market introduction of 4H-SiC MOSFET requires a special focus on device reliability and simplicity of use to replace Silicon switches in existing applications. This paper describes STMicroelectronics (STM) approach to define methodology and design solutions able to guarantee the end-users and to drive their choice toward 4H-SiC MOSFET as an ideal power component.


Materials ◽  
2021 ◽  
Vol 14 (13) ◽  
pp. 3554
Author(s):  
Jaeyeop Na ◽  
Jinhee Cheon ◽  
Kwangsoo Kim

In this paper, a novel 4H-SiC split heterojunction gate double trench metal-oxide-semiconductor field-effect transistor (SHG-DTMOS) is proposed to improve switching speed and loss. The device modifies the split gate double trench MOSFET (SG-DTMOS) by changing the N+ polysilicon split gate to the P+ polysilicon split gate. It has two separate P+ shielding regions under the gate to use the P+ split polysilicon gate as a heterojunction body diode and prevent reverse leakage `current. The static and most dynamic characteristics of the SHG-DTMOS are almost like those of the SG-DTMOS. However, the reverse recovery charge is improved by 65.83% and 73.45%, and the switching loss is improved by 54.84% and 44.98%, respectively, compared with the conventional double trench MOSFET (Con-DTMOS) and SG-DTMOS owing to the heterojunction.


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