Unified and non-ideal switch model for analysis of switching circuits

Purpose This paper aims to propose a new unified and non-ideal switch model for analysis of switching circuits. Design/methodology/approach The model has a single unified structure that includes all possible states (on, off) of the switches. The analysis with the proposed switch model requires only one topology and uses the single system equation regardless of states of switches. Moreover, to improve accuracy, the model contains the on-state resistance and capacitive effect of switches. The system equations and the states of switches are updated by control variables, used in the model. Findings There are no restrictions on circuit topology and switch connections. Switches can be internally and externally controlled. The non-ideal nature of the model allows the switch to be modeled more realistically and eliminates the drawbacks of the ideal switch concept. After modeling with the proposed switch model, a linear circuit is obtained. Two examples related to switching circuits are included into the study. The results confirm the accuracy of the model. Originality/value This paper contributes a different switch model for analysis of switching converters to the literature. The main advantage of the model is that it has a unified and non-ideal property. With the proposed switch model, the transient events, like voltage spikes and high-frequency noises, caused by inductor and capacitor elements at switching instants can be observed properly.

Evolution of superconductivity and charge order in pressurized RbV3Sb5

The kagome metals AV3Sb5 (A = K, Rb, Cs) under ambient pressure exhibit an unusual charge order, from which superconductivity emerges. In this work, by applying hydrostatic pressure using a liquid pressure medium and carrying out electrical resistance measurements for RbV3Sb5, we find the charge order becomes suppressed under a modest pressure p c (1.4 < p c < 1.6 GPa), while the superconducting transition temperature T c is maximized. T c is then gradually weakened with further increase of pressure and reaches a minimum around 14.3 GPa, before exhibiting another maximum around 22.8 GPa, signifying the presence of a second superconducting dome. Distinct behaviors in the normal state resistance are found to be associated with the second superconducting dome, similar to KV3Sb5. Our findings point to qualitatively similar temperature-pressure phase diagrams in KV3Sb5 and RbV3Sb5, and suggest a close link between the second superconducting dome and the high-pressure normal state resistance.

Resistive Switching in CdTe/CdSe Core–Shell Quantum Dots Embedded Chitosan-Based Memory Devices

In this paper, we report on the resistive switching (RS) and conduction mechanisms in devices consisting of CdTe/CdSe core–shell quantum dots embedded chitosan composites active layer. Two devices with active layers sandwiched between (1) Al and Ag, and (2) ITO and Ag electrodes were studied. Both devices exhibited bipolar memory behavior with [Formula: see text] V and [Formula: see text][Formula: see text]V, for the Al-based device, while [Formula: see text] V and [Formula: see text][Formula: see text]V were observed for the ITO-based device, enabling both devices to be operated at low powers. However, the switching mechanisms of both devices were different, i.e., RS in Al device was attributed to conductive bridge mechanism, while space-charge-limited driven conduction filament attributed the switching mechanism of the ITO device. Additionally, the Al-based device showed long retention ([Formula: see text][Formula: see text]s) and a reasonable large ([Formula: see text]) ON/OFF ratio. Additionally, for this device, we also observed sweeping cycle-induced reversal of voltage polarity of the [Formula: see text] and [Formula: see text]. In contrast, we observed that increasing sweeping cycles resulted in an exponential decrease of the OFF-state resistance of the ITO-based device.

Electrical Characterizations of 35-kV Semi-Insulating Gallium Arsenide Photoconductive Switch

In this paper, a three-layer GaAs photoconductive semiconductor switch (GaAs PCSS) is designed to withstand high voltage from 20 to 35 kV. The maximum avalanche gain and minimum on-state resistance of GaAs PCSS are 1385 and 0.58 Ω, respectively, which are the highest values reported to date. Finally, the influence of the bias voltage on the avalanche stability is analyzed. The stability of the GaAs PCSS is evaluated and calculated. The results show that the jitter values at the bias voltages of 30 kV and 35 kV are 164.3 ps and 106.9 ps, respectively. This work provides guidance for the design of semiconductor switches with high voltage and high gain.

High Gain DC-DC Converter Integrating Dickson Charge Pump with Coupled Inductor Technique

In this paper, a novel high voltage gain DC-DC converter based on coupled inductor and voltage multiplier technique is proposed. The benefits of the proposed converter are ultra-high voltage gain, low voltage stress across the power switch and very low input current ripple by employing a low current ripple structure (LCR) at the input side. A low on state resistance (RDS(on)) of the power switch can be employed since the voltage stress is a maximum of 25% of the output voltage and the conduction losses of the switch is also reduced. Design of a 1.9kW, 48V at the low voltage side and 430V at the high voltage side is done and verified by simulation. Simulation results show an efficiency of over 93% when operating in continuous conduction mode (CCM).

Research on Improving the Working Current of NbOx-Based Selector by Inserting a Ti Layer

To achieve the highest possible integration storage density in the V-point structure, the working current of the selector in the one-selection one-resistance (1S1R) structure should match with the resistance random access memory (RRAM). In this study, a selector device is designed with a Ti/NbOx/Ti/Pt structure through the magnetron sputtering method and achieves excellent performance of threshold switching under ultra-large compliance current (CC) up to 100 mA. Furthermore, both the switching voltages and the OFF-state resistance of the device demonstrate excellent stability even when CC is increased to a milliampere level, attributed from the existence of metallic NbO in the switching layer. This study provides evidence that a Ti/NbOx/Ti/Pt device has a great potential to drive RRAM in the V-point structure.

Mechanism Analysis of Dynamic On-State Resistance Degradation for a Commercial GaN HEMT Using Double Pulse Test

The dynamic on-resistance (RON) behavior of one commercial GaN HEMT device with p-GaN gate is investigated under hard-switching conditions. The non-monotonic performance of dynamic RON with off-state voltage ranging from 50 to 400 V is ascribed to the “leaky dielectric” model. The highest normalized RON value of 1.22 appears at 150 and 200 V. The gradual increase and following maximum of dynamic RON are found when the device is exposed to a stress voltage for an extended stress time under 100 and 200 V, which is due to a much longer trapping time compared to detrapping time related to deep acceptors and donors. No obvious RON degradation, thanks to the suppressed trapping effect, is observed at higher VDS. From the multi-pulse test, the dynamic RON is seen to be insensitive to the frequency. It is demonstrated that the leakage, especially under source and drain contact, is a key issue in the dynamic resistance degradation.