scholarly journals On-chip nanophotonic broadband wavelength detector with 2D-Electron gas

Nanophotonics ◽  
2021 ◽  
Vol 0 (0) ◽  
Author(s):  
Vishal Kaushik ◽  
Swati Rajput ◽  
Sulabh Srivastav ◽  
Lalit Singh ◽  
Prem Babu ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Detection System ◽  
Low Cost ◽  
Electron Gas ◽  
Fabrication Process ◽  
Novel Approach ◽  
Efficient Alternative ◽  
Wavelength Detector ◽  
On Chip ◽  
Wavelength Detection

Abstract Miniaturized, low-cost wavelength detectors are gaining enormous interest as we step into the new age of photonics. Incompatibility with integrated circuits or complex fabrication requirement in most of the conventionally used filters necessitates the development of a simple, on-chip platform for easy-to-use wavelength detection system. Also, intensity fluctuations hinder precise, noise free detection of spectral information. Here we propose a novel approach of utilizing wavelength sensitive photocurrent across semiconductor heterojunctions to experimentally validate broadband wavelength detection on an on-chip platform with simple fabrication process. The proposed device utilizes linear frequency response of internal photoemission via 2-D electron gas in a ZnO based heterojunction along with a reference junction for coherent common mode rejection. We report sensitivity of 0.96 μA/nm for a broad wavelength-range of 280 nm from 660 to 940 nm. Simple fabrication process, efficient intensity noise cancelation along with heat resistance and radiation hardness of ZnO makes the proposed platform simple, low-cost and efficient alternative for several applications such as optical spectrometers, sensing, and Internet of Things (IOTs).

scholarly journals Interband Cascade Photonic Integrated Circuits on Native III-V Chip

Sensors ◽  
2021 ◽  
Vol 21 (2) ◽  
pp. 599
Author(s):  
Jerry R. Meyer ◽  
Chul Soo Kim ◽  
Mijin Kim ◽  
Chadwick L. Canedy ◽  
Charles D. Merritt ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Detection System ◽  
Laser Cavity ◽  
Building Blocks ◽  
Drive Power ◽  
Optical Elements ◽  
Photonic Integrated Circuit ◽  
Cleaved Facets ◽  
On Chip

We describe how a midwave infrared photonic integrated circuit (PIC) that combines lasers, detectors, passive waveguides, and other optical elements may be constructed on the native GaSb substrate of an interband cascade laser (ICL) structure. The active and passive building blocks may be used, for example, to fabricate an on-chip chemical detection system with a passive sensing waveguide that evanescently couples to an ambient sample gas. A variety of highly compact architectures are described, some of which incorporate both the sensing waveguide and detector into a laser cavity defined by two high-reflectivity cleaved facets. We also describe an edge-emitting laser configuration that optimizes stability by minimizing parasitic feedback from external optical elements, and which can potentially operate with lower drive power than any mid-IR laser now available. While ICL-based PICs processed on GaSb serve to illustrate the various configurations, many of the proposed concepts apply equally to quantum-cascade-laser (QCL)-based PICs processed on InP, and PICs that integrate III-V lasers and detectors on silicon. With mature processing, it should become possible to mass-produce hundreds of individual PICs on the same chip which, when singulated, will realize chemical sensing by an extremely compact and inexpensive package.

A Novel Scheme for Wide Bandwidth Chip-to-Chip Communications

2007 ◽  
Vol 4 (1) ◽  
pp. 1-7 ◽  
Author(s):  
Qing Liu ◽  
Patrick Fay ◽  
Gary H. Bernstein
Keyword(s):  
Integrated Circuits ◽  
Coplanar Waveguide ◽  
Impedance Matching ◽  
Three Dimensional ◽  
Fabrication Process ◽  
Silicon Substrates ◽  
Electromagnetic Simulations ◽  
Communication Paradigm ◽  
On Chip ◽  
Test Chips

Quilt Packaging (QP), a novel chip-to-chip communication paradigm for system-in-package integration, is presented. By forming protruding metal nodules along the edges of the chips and interconnecting integrated circuits (ICs) through them, QP offers an approach to ameliorate the I/O speed bottleneck. A fabrication process that includes deep reactive ion etching, electroplating, and chemical-mechanical polishing is demonstrated. As a low-temperature process, it can be easily integrated into a standard IC fabrication process. Three-dimensional electromagnetic simulations of coplanar waveguide QP structures have been performed, and geometries intended to improve impedance matching at the interface between the on-chip interconnects and the chip-to-chip nodule structures were evaluated. Test chips with 100 μm wide nodules were fabricated on silicon substrates, and s-parameters of chip-to-chip interconnects were measured. The insertion loss of the chip-to-chip interconnects was as low as 0.2 dB at 40 GHz. Simulations of 20 μm wide QP structures suggest that the bandwidth of the inter-chip nodules is expected to be above 200 GHz.

scholarly journals Low-Power Pedestrian Detection System on FPGA

Proceedings ◽  
2019 ◽  
Vol 31 (1) ◽  
pp. 35 ◽  
Author(s):  
Vinh Ngo ◽  
David Castells-Rufas ◽  
Arnau Casadevall ◽  
Marc Codina ◽  
Jordi Carrabina
Keyword(s):  
Low Power ◽  
Detection System ◽  
Low Cost ◽  
Pedestrian Detection ◽  
Support Vector ◽  
Embedded Processor ◽  
Car Industry ◽  
Field Programmable ◽  
On Chip ◽  
Histogram Of Gradients

Pedestrian detection is one of the key problems in the emerging self-driving car industry. In addition, the Histogram of Gradients (HOG) algorithm proved to provide good accuracy for pedestrian detection. Many research works focused on accelerating HOG algorithm on FPGA (Field-Programmable Gate Array) due to its low-power and high-throughput characteristics. In this paper, we present an energy-efficient HOG-based implementation for pedestrian detection system on a low-cost FPGA system-on-chip platform. The hardware accelerator implements the HOG computation and the Support Vector Machine classifier, the rest of the algorithm is mapped to software in the embedded processor. The hardware runs at 50 Mhz (lower frequency than previous works), thus achieving the best pixels processed per clock and the lower power design.

scholarly journals A Broadband THz On-Chip Transition Using a Dipole Antenna with Integrated Balun

Electronics ◽  
2018 ◽  
Vol 7 (10) ◽  
pp. 236 ◽  
Author(s):  
Wonseok Choe ◽  
Jinho Jeong
Keyword(s):  
Integrated Circuits ◽  
Insertion Loss ◽  
Low Cost ◽  
Three Dimensional ◽  
Equivalent Circuit Model ◽  
Dipole Antenna ◽  
Impedance Match ◽  
Inp Substrate ◽  
On Chip ◽  
High Dielectric

A waveguide-to-microstrip transition is an essential component for packaging integrated circuits (ICs) in rectangular waveguides, especially at millimeter-wave and terahertz (THz) frequencies. At THz frequencies, the on-chip transitions, which are monolithically integrated in ICs are preferred to off-chip transitions, as the former can eliminate the wire-bonding process, which can cause severe impedance mismatch and additional insertion loss of the transitions. Therefore, on-chip transitions can allow the production of low cost and repeatable THz modules. However, on-chip transitions show limited performance in insertion loss and bandwidth, more seriously, this is an in-band resonance issue. These problems are mainly caused by the substrate used in the THz ICs, such as an indium phosphide (InP), which exhibits a high dielectric constant, high dielectric loss, and high thickness, compared with the size of THz waveguides. In this work, we propose a broadband THz on-chip transition using a dipole antenna with an integrated balun in the InP substrate. The transition is designed using three-dimensional electromagnetic (EM) simulations based on the equivalent circuit model. We show that in-band resonances can be induced within the InP substrate and also prove that backside vias can effectively eliminate these resonances. Measurement of the fabricated on-chip transition in 250 nm InP heterojunction bipolar transistor (HBT) technology, shows wideband impedance match and low insertion loss at H-band frequencies (220–320 GHz), without in-band resonances, due to the properly placed backside vias.

Bipolar device technology challenge and opportunity

1985 ◽  
Vol 63 (6) ◽  
pp. 683-692 ◽  
Author(s):  
H. D. Barber
Keyword(s):  
Integrated Circuits ◽  
High Speed ◽  
Low Cost ◽  
Chemical Vapor ◽  
Low Noise ◽  
Isolation Techniques ◽  
Propagation Delays ◽  
Technological Barriers ◽  
On Chip ◽  
Bipolar Device

Silicon bipolar device technologies provided 65% of the world's integrated circuits in 1983. Where low noise, high current, low or high voltage, high speed or low cost are required, bipolar technologies are used. This paper will review the present status of bipolar device technologies, which make possible 100-ps gate-propagation delays, 150-μm2 gate areas, 1-GHz bandwidth amplifiers, on-chip control of over 1-A, 350-V operation, 14-GHz fT's and 10-ns. analogue-to-8-bit digital conversion. These devices are realized because of advances in isolation techniques, chemical-vapor deposition, photolithography, diffusion, ion implantation, conductor–contact interconnection technology, etching processes, and materials preparation. This paper will discuss some of the fundamental problems, modelling difficulties, and technological barriers that will impact the future development of bipolar integrated circuits.

Low-Cost Packaging of 300 GHz Integrated Circuits With an On-Chip Patch Antenna

2019 ◽  
Vol 18 (11) ◽  
pp. 2444-2448 ◽  
Author(s):  
Harshpreet S. Bakshi ◽  
Pranith R. Byreddy ◽  
K.O. Kenneth ◽  
A. Blanchard ◽  
Mark Lee ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Patch Antenna ◽  
Low Cost ◽  
On Chip

scholarly journals Corrections to “Low-Cost Packaging of 300 GHz Integrated Circuits With an On-Chip Patch Antenna”

2020 ◽  
Vol 19 (8) ◽  
pp. 1466-1466
Author(s):  
Harshpreet S. Bakshi ◽  
Pranith R. Byreddy ◽  
Kenneth K. O ◽  
Andrew Blanchard ◽  
Mark Lee ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Patch Antenna ◽  
Low Cost ◽  
On Chip

A low-cost 2D fluorescence detection system for μm sized beads on-chip

Lab on a Chip ◽  
2012 ◽  
Vol 12 (10) ◽  
pp. 1780 ◽  
Author(s):  
Loes I. Segerink ◽  
Maarten J. Koster ◽  
Ad J. Sprenkels ◽  
Albert van den Berg
Keyword(s):  
Fluorescence Detection ◽  
Detection System ◽  
Low Cost ◽  
On Chip ◽  
Fluorescence Detection System

scholarly journals High-Precision Low-Cost Gimballing Platform for Long-Range Railway Obstacle Detection

Sensors ◽  
2022 ◽  
Vol 22 (2) ◽  
pp. 474
Author(s):  
Elio Hajj Assaf ◽  
Cornelius von von Einem ◽  
Cesar Cadena ◽  
Roland Siegwart ◽  
Florian Tschopp
Keyword(s):  
Long Range ◽  
High Precision ◽  
High Speed ◽  
Detection System ◽  
Low Cost ◽  
Obstacle Detection ◽  
Numerical Control ◽  
Railway Network ◽  
Lever System ◽  
Novel Approach

Increasing demand for rail transportation results transportation by rail, resulting in denser and more high-speed usage of the existing railway network, making makes new and more advanced vehicle safety systems necessary. Furthermore, high traveling speeds and the greatlarge weights of trains lead to long braking distances—all of which necessitates Long braking distances, due to high travelling speeds and the massive weight of trains, necessitate a Long-Range Obstacle Detection (LROD) system, capable of detecting humans and other objects more than 1000 m in advance. According to current research, only a few sensor modalities are capable of reaching this far and recording sufficiently accurate enoughdata to distinguish individual objects. The limitation of these sensors, such as a 1D-Light Detection and Ranging (LiDAR), is however a very narrow Field of View (FoV), making it necessary to use ahigh-precision means of orienting to target them at possible areas of interest. To close this research gap, this paper presents a novel approach to detecting railway obstacles by developinga high-precision pointing mechanism, for the use in a future novel railway obstacle detection system In this work such a high-precision pointing mechanism is developed, capable of targeting aiming a 1D-LiDAR at humans or objects at the required distance. This approach addresses To address the challenges of a low target pricelimited budget, restricted access to high-precision machinery and equipment as well as unique requirements of our target application., a novel pointing mechanism has been designed and developed. By combining established elements from 3D printers and Computer Numerical Control (CNC) machines with a double-hinged lever system, simple and cheaplow-cost components are capable of precisely orienting an arbitrary sensor platform. The system’s actual pointing accuracy has been evaluated using a controlled, in-door, long-range experiment. The device was able to demonstrate a precision of 6.179 mdeg, which is at the limit of the measurable precision of the designed experiment.

Design and characterization of an integrated microwave generator for BIST applications

2014 ◽  
Vol 6 (2) ◽  
pp. 195-200 ◽  
Author(s):  
Imene Lahbib ◽  
Mohamed Aziz Doukkali ◽  
Philippe Descamps ◽  
Patrice Gamand ◽  
Christophe Kelma ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Low Cost ◽  
Signal Generator ◽  
Test Method ◽  
Microwave Integrated Circuits ◽  
Cost Measurement ◽  
Bicmos Process ◽  
On Chip ◽  
Rf Signal

This paper presents a circuit architecture for a new integrated on chip test method for microwave circuits. The proposed built-in-self-test (BIST) cell targets a direct low-cost measurement technique of the gain and the 1 dB input compression point (CP1) of a K-band satellite receiver in the 18–22 GHz frequency bandwidth. A signal generator at the radiofrequency (RF) front end input of the device under test (DUT) has been integrated on the same chip. To inject this RF signal, a loopback technique has been used and the design has been accommodated for it. This paper focuses on the design of the most sensitive block of the BIST circuit, i.e. the RF signal generator. This circuit, fabricated in a SIGe:C BiCMOS process, consumes 10 mA. It presents a dynamic power range of 17 dB (−41; −24 dBm) and operates in a frequency range of 5.6 GHz (17.5; 23 GHz). This BIST circuit gives new perspectives in terms of test strategy, cost reduction, and measurement accuracy for microwave-integrated circuits and could be adapted for mm-wave circuits.

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