Dopant Enhanced Grain Growth During Crystallization of Amorphous Silicon Using Rapid Thermal Anealing

1990 ◽  
Vol 182 ◽  
Author(s):  
R. Kakkad ◽  
S. J. Fonash ◽  
P. R. Howell
Keyword(s):  
Ion Implantation ◽  
Amorphous Silicon ◽  
Grain Growth ◽  
Thermal Budget ◽  
Low Resistivity ◽  
Annealing Temperatures ◽  
Grain Sizes ◽  
Precursor Material ◽  
Low Thermal Budget

AbstractPECVD a-Si deposited at 250ºC on 7059 glass was used as precursor material to produce low resistivity large grain doped poly Si. The films doped in the range of 1020−1021 cm-3 with P during growth or by ion implantation wereannealed at 700ºC for times 2 to 5 minutes using RTA. A dopant enhanced grain growth was observed with grain sizes of the order of 3 μm for films of only 2000Å thickness. Resistivity as low as 6x10-4 Ω-cm and mobility as highas 34 cm2 /V-sec. were obtained using this low thermal budget process.These values are comparable to those obtained in the literature using significantly higher annealing temperatures.

Low-Resistivity Amorphous Silicon for Contacts Using Low-Temperature Rapid Thermal Annealing

1992 ◽  
Vol 258 ◽  
Author(s):  
Lynnita Knoch ◽  
Gordon Tam ◽  
N. David Theodore ◽  
Ron Pennell
Keyword(s):  
Low Temperature ◽  
Ion Implantation ◽  
Grain Boundaries ◽  
Amorphous Silicon ◽  
Sheet Resistance ◽  
Rapid Thermal Annealing ◽  
Thermal Budget ◽  
Temperature Rapid Thermal Annealing ◽  
Low Thermal Budget ◽  
Polycrystalline Deposition

ABSTRACTFabrication of SiGe heterojunction bipolar transistors (HBTs) requires a low thermal budget to avoid relaxation of the strained SiGe base layer. Ion implantation is one of the most widely used techniques to achieve contacts. However, due to thermal budget constraints, low temperature rapid thermal annealing (RTA) cycles to activate these implants are insufficient to anneal out all of the implant damage. Polysilicon contacts provide an alternative to ion implantation, but are typically annealed at high temperatures (>950°C) to achieve low sheet resistivity. In this study, amorphous silicon and polycrystalline silicon films were implanted with boron, arsenic, or phosphorus and RTA'd at temperatures from 800°C to 950°C and compared to single crystal silicon with identical implants and RTA cycles. The films were characterized using four-point probe, Hall measurements, TEM (transmission electron microscopy), and SIMS (secondary-ion mass-spectrometry). TEM analysis shows that the amorphous deposition produces larger grains upon RTA due to more rapid grain growth than the polycrystalline deposition. The sheet resistance for the amorphous deposited films is much lower than that of the polycrystalline deposition for all implant conditions. Activations of the implants indicate that the arsenic and phosphorus segregate to the grain boundaries, while the boron does not. The segregation is more significant for the polycrystalline films than for the amorphous films and can be explained by the grain boundary area. For contacts to the SiGe HBT, which requires a low thermal budget, an amorphous deposited silicon film is advantageous over a polycrystalline film at low annealing temperatures because it has lower sheet resistance, less segregation to the grain boundaries, and produces larger grains.

Low Thermal Budget Crystallization of Amorphous Silicon by Nanoclusters

2009 ◽  
Vol 12 (9) ◽  
pp. H319 ◽  
Author(s):  
Il-Suk Kang ◽  
Sung-Hun Yu ◽  
Hyun-Sang Seo ◽  
Jeong-Hun Kim ◽  
Jun-Mo Yang ◽  
...  
Keyword(s):  
Amorphous Silicon ◽  
Thermal Budget ◽  
Low Thermal Budget

Thermal Stability and Mechanical Properties of Nanocrystalline L12 Al3Hf and (Al+12.5 at.%Zn)3Hf Prepared by MA and SPS

2004 ◽  
Vol 449-452 ◽  
pp. 809-812 ◽  
Author(s):  
Chang Won Kang ◽  
Hee Sup Jang ◽  
Seon Jin Kim
Keyword(s):  
Mechanical Properties ◽  
Thermal Stability ◽  
Fracture Toughness ◽  
Phase Transformation ◽  
Grain Growth ◽  
Annealing Temperature ◽  
Annealing Temperatures ◽  
Grain Sizes ◽  
Plasma Sintering ◽  
Spark Plasma

Thermal stability and mechanical properties of L12 Al3Hf and (Al+12.5 at.%Zn))3Hf synthesized by mechanical alloying(MA) and spark plasma sintering(SPS) were investigated. Nanocrystalline L12 phase was produced after MA for 8 and 10 hrs in Al3Hf and (Al+12.5 at.%Zn))3Hf powders, respectively. The grain sizes were reduced to about 10 nm in both systems after MA for 20 hrs. After SPS, L12 phase was maintained only in Zn added system. In (Al+12.5 at.%Zn))3Hf, L12 to D023 phase transformation was started at about 850°C and finished at about 1150°C Microhardness was decreased with increasing the annealing temperature while fracture toughness was increased due to the grain growth. Fracture toughness of (Al+12.5 at.%Zn))3Hf was greater than that of Al3Hf in all annealing temperatures. Fracture toughness of (Al+12.5 at.%Zn))3Hf after annealing at 1200°C was about 5.38 MPam1/2.

4H-SiC Defects Evolution by Thermal Processes

2017 ◽  
Vol 897 ◽  
pp. 181-184 ◽  
Author(s):  
Nicolò Piluso ◽  
Maria Ausilia di Stefano ◽  
Simona Lorenti ◽  
Francesco La Via
Keyword(s):  
Ion Implantation ◽  
Thermal Process ◽  
Defect Density ◽  
Annealing Process ◽  
Fine Tuning ◽  
Thermal Processes ◽  
Thermal Budget ◽  
Annealing Temperatures ◽  
Preliminary Annealing

4H-SiC defects evolution after thermal processes has been evaluated. Different annealing temperatures have been used to decrease the defect density of epitaxial layer (as stacking faults) and recover the damage occurred after ion implantation. The propagation of defects has been detected by Photoluminescence tool and monitored during the thermal processes. The results show that implants do not affect the surface roughness and how a preliminary annealing process, before ion implantation step, can be useful in order to reduce the SFs density. It shown the effect of tuned thermal process. A kind of defect, generated by implant and subsequent annealing, can be removed by an appropriate thermal budget, while others can increase. A fine tuning of thermal process parameters, temperature and timing, is useful to recover the crystallographic quality of the epilayer and increase the yield of the power device.

Damage Removal of Low Energy Ion Implanted BF2 Layers in Silicon

1989 ◽  
Vol 147 ◽  
Author(s):  
E. Myers ◽  
J. J. Hren
Keyword(s):  
Free Surface ◽  
Ion Implantation ◽  
Thermal Processing ◽  
Low Energy ◽  
Silicon Substrates ◽  
Dislocation Loops ◽  
Tem Analysis ◽  
Thermal Budget ◽  
Damage Location ◽  
Annealing Temperatures

AbstractRecent results indicate that thermal budgets associated with ion implantation induced end of range damage removal is affected by the presence of a free surface. Low energy BF2 implants (6 keV) were done into both single crystal and Ge preamorphized silicon substrates. Rapid thermal processing was used to study the residual end of range defect structure in the temperature range from 700 to 1000°C. 6 keV, 5E14 cm-2 BF2 implantation resulted in formation of continuous amorphous layers approximately 10 nm deep with a mean B penetration of approximately 7 nm. Conventional TEM analysis found the structures to be completely free of any spanning “hairpin” dislocations or stacking faults associated with the BF2 implant for all the annealing temperatures. For anneals between 700 °C and 900°C end of range damage formation resulted, but the size of the dislocation loops remained small. Annealing at 1000°C, 10 seconds showed no evidence of residual end of range damage. Location of the end of range damage region close to the free surface was found to decrease the thermal budget required for the removal of ion implantation induced radiation damage.

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