Characterization of Preclean Induced Surface Damage by Rapid Thermal Processing

1991 ◽  
Vol 224 ◽  
Author(s):  
T. Y. Hsieh ◽  
K. H. Jung ◽  
D. L. Kwong ◽  
T. H. Koschmieder ◽  
J. C. Thompson
Keyword(s):  
Thermal Processing ◽  
Substrate Surface ◽  
Critical Role ◽  
Rapid Thermal Processing ◽  
Surface Damage ◽  
Optical Reflectance ◽  
High Temperature Processing ◽  
Dopant Redistribution

AbstractIn-situ precleaning of the substrate surface plays a critical role in Si epitaxial growth. We have demonstrated that the preclean process can cause considerable surface damage, which strongly depends on process parameters such as system base pressure and temperature. Nomarski optical microscopy, SEM, and optical reflectance were used to characterize the surface morphology. Optical reflectance was more sensitive to surface damage but was also strongly dependent on substrate dopant redistribution after high temperature processing.

Structural and Electrical Characterization of FeSix – Layers (1≤ X ≤2) Prepared by RTP of Fe Layers Sputtered on Si (100)

1995 ◽  
Vol 387 ◽  
Author(s):  
M. Líbezný ◽  
J. Poortmans ◽  
P. H. Amesz ◽  
R. A. Donaton ◽  
K. Kyllesbech Larsen ◽  
...  
Keyword(s):  
Surface Morphology ◽  
Phase Transformations ◽  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Electrical Characterization ◽  
Phase Content ◽  
Silicon Heterojunctions ◽  
Emissivity Measurements

Abstractβ-FeSi2 is a semiconductor with a potential for photovoltaic and optoelectronic applications. The preparation of β-FeSi2-layers by rapid thermal processing (RTP) of Fe layers on silicon is investigated in this paper. Fe layers with typical thicknesses of 30 nm were sputtered on Si (100) substrates. We correlated the surface morphology of samples subjected to different RTP treatments with their composition and phase content. Phase transformations during the anneal were also studied by in-situ emissivity measurements. Rectifying and contacting behaviour of silicide/silicon heterojunctions prepared at several RTP-temperatures is presented at the end of this paper. Since it is not possible to prepare β-FeSi2-layers without a presence of either FeSi or α-FeSi2 metallic phases, these structures have poor heterojunction characteristics.

Characterization of PSG Films Reflowed in Steam Using Rapid Thermal Processing

1985 ◽  
Vol 52 ◽  
Author(s):  
N. Shah ◽  
J. M. C. Vittie ◽  
N. Sharif ◽  
J. Nulman ◽  
A. Gat
Keyword(s):  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Operating Regime ◽  
Junction Depth ◽  
Thermal Oxide ◽  
Rapid Thermal Annealer ◽  
Flow Cycle ◽  
Phosphosilicate Glass

ABSTRACTThis study describes the use of a steam environment to reflow phosphosilicate glass (PSG) samples using a HEATPULSE® rapid thermal annealer. The samples comprised PSG over poly steps and of open contacts in PSG. It was observed that reflow occurs 50°C lower in steam than in dry O2. An acceptable flow cycle for 8 w/o P in PSG glass is 1050°C for 10 seconds in steam, while for 6 w/o P PSG it is 1100°C for 10 seconds. Steam is found to be an effective amibient for densification of the PSG film. The thermal oxide grown in the contact during opening reflow was determined to be near 140 A. The operating regime for a junction depth <0.4 um and a reflow angle < 75° is presented for 8 w/o P.

The Effect of Lamps Radius on Thermal Stresses for Rapid Thermal Processing System

2003 ◽  
Vol 125 (3) ◽  
pp. 504-511 ◽  
Author(s):  
Ching-Kong Chao ◽  
Shih-Yu Hung ◽  
Cheng-Ching Yu
Keyword(s):  
Thermal Processing ◽  
Thermal Stresses ◽  
Maximum Shear Stress ◽  
Rapid Thermal Processing ◽  
Processing System ◽  
Practical Consideration ◽  
Fully Implicit ◽  
Control Scheme ◽  
Potential Applications ◽  
Dopant Redistribution

The concept of rapid thermal processing has many potential applications in microelectronics manufacturing, but the details of chamber design remains an active area of research. In this work the influence of lamps radius on the thermal stresses in a wafer during the cooling process is studied in detail. Since the equations governing the present thermal-elastic system are coupled in nature, the solution for the temperature and stresses must proceed simultaneously by using a fully implicit finite difference method. After the thermal stresses are obtained, the optimum lamps radii for various heights of the chamber under the constant power ramp-down control scheme are determined based on the maximum shear stress failure criterion. The shortest cooling time that can significantly reduce the thermal budget and dopant redistribution is also predicted by applying the maximum stress control scheme. The result obtained is useful in the design of a reliable rapid thermal processor based on a more practical consideration, thermal stress.

Preparation of CIGSS Thin-Film Solar Cells by Rapid Thermal Processing

2006 ◽  
Vol 129 (3) ◽  
pp. 323-326
Author(s):  
Sachin S. Kulkarni ◽  
Jyoti S. Shirolikar ◽  
Neelkanth G. Dhere
Keyword(s):  
Thin Film ◽  
Solar Cells ◽  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Electrical Characterization ◽  
Soda Lime ◽  
Thin Film Solar Cells ◽  
Soda Lime Glass ◽  
X Ray

Rapid thermal processing (RTP) provides a way to rapidly heat substrates to an elevated temperature to perform relatively short duration processes, typically less than 2–3min long. RTP can be utilized to minimize the process cycle time without compromising process uniformity, thus eliminating a bottleneck in CuIn1−xGaxSe2−ySy (CIGSS) module fabrication. Some approaches have been able to realize solar cells with conversion efficiencies close or equal to those for conventionally processed solar cells with similar device structures. A RTP reactor for preparation of CIGSS thin films on 10cm×10cm substrates has been designed, assembled, and tested at the Florida Solar Energy Center’s PV Materials Lab. This paper describes the synthesis and characterization of CIGSS thin-film solar cells by the RTP technique. Materials characterization of these films was done by scanning electron microscopy, x-ray energy dispersive spectroscopy, x-ray diffraction, Auger electron spectroscopy, electron probe microanalysis, and electrical characterization was done by current–voltage measurements on soda lime glass substrates by the RTP technique. Encouraging results were obtained during the first few experimental sets, demonstrating that reasonable solar cell efficiencies (up to 9%) can be achieved with relatively shorter cycle times, lower thermal budgets, and without using toxic gases.

Temperature Monitoring by Ripple Pyrometry in Rapid Thermal Processing

1996 ◽  
Vol 429 ◽  
Author(s):  
Binh Nguyenphu ◽  
Minseok Oh ◽  
Anthony T. Fiory
Keyword(s):  
Temperature Control ◽  
Integrated Circuit ◽  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Back Side ◽  
Integrated Circuit Manufacturing ◽  
Current Trends ◽  
Processing Steps ◽  
Electrical Data

AbstractCurrent trends of silicon integrated circuit manufacturing demand better temperature control in various thermal processing steps. Rapid thermal processing (RTP) has become a key technique because its single wafer process can accommodate the reduced thermal budget requirements arising from shrinking the dimensions of devices and the trend to larger wafers. However, temperature control by conventional infrared pyrometry, which is highly dependent on wafer back side conditions, is insufficiently accurate for upcoming technologies. Lucent Technologies Inc., formerly known as AT&T Microelectronics and AT&T Bell Laboratories, has developed a powerful real-time pyrometry technique using the A/C ripple signal from heating lamps for in-situ temperature measurement. Temperature and electrical data from device wafers have been passively collected by ripple pyrometers in three RTP systems and analyzed. In this paper we report the statistical analysis of ripple temperature and electrical data from device wafers for a typical implant anneal process temperature range of 900 to 1000 °C.

Polysilicon Emitter Transistors Manufactured using a Novel Limited Reaction Processing System

1989 ◽  
Vol 146 ◽  
Author(s):  
Fred Ruddell ◽  
Colin Parkes ◽  
B Mervyn Armstrong ◽  
Harold S Gamble
Keyword(s):  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Processing System ◽  
Bipolar Transistors ◽  
Native Oxide ◽  
Plasma Oxidation ◽  
Oxide Removal ◽  
Polysilicon Emitter ◽  
Reaction Processing

ABSTRACTThis paper describes a LPCVD reactor which was developed for multiple sequential in-situ processing. The system is capable of rapid thermal processing in the presence of plasma stimulation and has been used for native oxide removal, plasma oxidation and silicon deposition. Polysilicon layers produced by the system are incorporated into N-P-N polysilicon emitter bipolar transistors. These devices fabricated using a sequential in-situ plasma clean-polysilicon deposition schedule exhibited uniform gains limited to that of long single crystal emitters. Devices with either plasma grown or native oxide layers below the polysilicon exhibited much higher gains. The suitability of the system for sequential and limited reaction processing has been established.

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