Temperature Monitoring by Ripple Pyrometry in Rapid Thermal Processing

1996 ◽  
Vol 429 ◽  
Author(s):  
Binh Nguyenphu ◽  
Minseok Oh ◽  
Anthony T. Fiory
Keyword(s):  
Temperature Control ◽  
Integrated Circuit ◽  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Back Side ◽  
Integrated Circuit Manufacturing ◽  
Current Trends ◽  
Processing Steps ◽  
Electrical Data

AbstractCurrent trends of silicon integrated circuit manufacturing demand better temperature control in various thermal processing steps. Rapid thermal processing (RTP) has become a key technique because its single wafer process can accommodate the reduced thermal budget requirements arising from shrinking the dimensions of devices and the trend to larger wafers. However, temperature control by conventional infrared pyrometry, which is highly dependent on wafer back side conditions, is insufficiently accurate for upcoming technologies. Lucent Technologies Inc., formerly known as AT&T Microelectronics and AT&T Bell Laboratories, has developed a powerful real-time pyrometry technique using the A/C ripple signal from heating lamps for in-situ temperature measurement. Temperature and electrical data from device wafers have been passively collected by ripple pyrometers in three RTP systems and analyzed. In this paper we report the statistical analysis of ripple temperature and electrical data from device wafers for a typical implant anneal process temperature range of 900 to 1000 °C.

Rapid Thermal Annealing and Oxidation of Silicon Wafers with Back-Side Films

1997 ◽  
Vol 470 ◽  
Author(s):  
A. T. Fiory
Keyword(s):  
Thermal Oxidation ◽  
Sheet Resistance ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Temperature Control ◽  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Oxide Thickness ◽  
Back Side ◽  
Control Accuracy

ABSTRACTTemperatures for lamp-heated rapid thermal processing of wafers with various back-side films were controlled by a Lucent Technologies pyrometer which uses a/c lamp ripple to compensate for emissivity. Process temperatures for anneals of arsenic and boron implants were inferred from post-anneal sheet resistance, and for rapid thermal oxidation, from oxide thickness. Results imply temperature control accuracy of 12°C to 17°C at 3 standard deviations.

In-Situ Temperature Control for Rtp Via Thermal Expansion Measurement

1993 ◽  
Vol 303 ◽  
Author(s):  
Bruce Peuse ◽  
Allan Rosekrans
Keyword(s):  
Thermal Expansion ◽  
Temperature Control ◽  
Measurement Technique ◽  
Preliminary Data ◽  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Processing System ◽  
Wafer Temperature ◽  
Thermal Expansion Measurement

ABSTRACTA new method of temperature control for rapid thermal processing of silicon wafers is presented whereby in-situ wafer temperature is determined by measurement of wafer thermal expansion via an optical micrometer mechanism. The expansion measurement technique and its implementation into a rapid thermal processing system for temperature control are described. Preliminary data show the wafer to wafer temperature repeatability to be 1% (3-σ) using this technique.

Temperature Control and Temperature Uniformity During Rapid Thermal Processing

1991 ◽  
Vol 224 ◽  
Author(s):  
Peter Vandenabeele ◽  
Karen Maex
Keyword(s):  
Temperature Control ◽  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Temperature Uniformity ◽  
Chamber Design

AbstractAn overview is given of the major problems in temperature control and uniformity control. For temperature control varying emissivity due to layers, roughness, doping and chamber design are discussed, together with problems due to lamp radiation. The main way to go seems to be in-situ emissivity correction. For uniformity control, the main problems are non-uniform reflector radiation and patteren induced non-uniformity. The solution seems to be the design of a reflective chamber with uniform reflected radiation.

Submicron P-Channel Mos Devices with Boron Doped Polysilicon Gates Fabricated by Rapid Thermal Processing

1990 ◽  
Vol 182 ◽  
Author(s):  
Sheldon M. Kugelmass ◽  
J. Peter Krusius
Keyword(s):  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Budget Process ◽  
Mos Devices ◽  
Boron Doped ◽  
Polysilicon Gate ◽  
Junction Formation ◽  
Low Thermal Budget ◽  
Processing Steps

AbstractA low thermal budget process is demonstrated for the fabrication of submicron Boron doped polysilicon gate p-channel MOS devices with ultra thin gate insulators. All critical processing steps with temperatures above 700 °C, including gate oxide growth and shallow source/drain junction formation, were performed by Rapid Thermal Processing (RTP). In situ doped polysilicon was used to eliminate the need for a high temperature drive-in step. Surface channel p-channel enhancement mode devices with excellent characteristics were fabricated to demonstrate the feasibility of this process.

Monte Carlo Simulation for Radiometric Temperature Measurement in Rapid Thermal Processing

2000 ◽  
Author(s):  
Y. H. Zhou ◽  
Y. J. Shen ◽  
Z. M. Zhang ◽  
B. K. Tsai ◽  
D. P. DeWitt
Keyword(s):  
Monte Carlo ◽  
Temperature Measurement ◽  
Integrated Circuit ◽  
Thermal Processing ◽  
Radiation Thermometry ◽  
Monte Carlo Model ◽  
Rapid Thermal Processing ◽  
Spectral Radiance ◽  
Effective Emissivity ◽  
Integrated Circuit Manufacturing

Abstract This work employs a Monte Carlo method to study the radiative process in a rapid thermal processing (RTP) furnace. A “true” effective emissivity, accounting for the directional optical properties, is defined and predicted in order to determine the wafer temperature from the measured spectral radiance temperature using light-pipe radiation thermometry. The true effective emissivity is the same as the hemispherical effective emissivity for diffuse wafers, in which case the Monte Carlo model gives the same results as the net-radiation method. Deviations exist between the hemispherical effective emissivity and the true effective emissivity for specular wafers because the effective emissivity is directional dependent. This research will help reduce the uncertainty in the temperature measurement for RTP furnaces to meet the future requirements for integrated circuit manufacturing.

Evolution of Stress During Formation of Titanium Disilicide by Rta and Tube Furnace Annealing

1990 ◽  
Vol 202 ◽  
Author(s):  
J.F. Jongste ◽  
O.B. Loopstra ◽  
G.C.A.M. Janssen ◽  
S. Radelaar
Keyword(s):  
Integrated Circuit ◽  
Thermal Processing ◽  
Reaction Rates ◽  
Titanium Disilicide ◽  
Furnace Annealing ◽  
Integrated Circuit Fabrication ◽  
Annealing Step ◽  
Circuit Fabrication ◽  
The Difference ◽  
Processing Steps

Integrated circuit fabrication consists of many processing steps: e.g. lithography, etching, implantation and metallization. Some of these processes are combined with thermal processing. Heat treatments require special attention because previous fabrication steps may be influenced: e.g. dopant profiles may be deteriorated. The amount of interference of an annealing step with a former process is determined by the ratio of the reaction rates (and hence by the difference in activation energies).

Silicon Rapid Thermal Processing with Ripple Pyrometry

1997 ◽  
Vol 502 ◽  
Author(s):  
A. T. Fiory
Keyword(s):  
Integrated Circuit ◽  
Thermal Processing ◽  
Wide Field ◽  
Loop Control ◽  
Dopant Activation ◽  
Integrated Circuit Fabrication ◽  
Metal Silicides ◽  
Circuit Fabrication ◽  
Infrared Lamps

ABSTRACTThermal processing in silicon integrated circuit fabrication steps for dopant activation, metal silicides, annealing, and oxidation commonly uses single-wafer furnaces that rapidly heat wafers with incandescent infrared lamps. Radiation pyrometers and thermocouple probes are the principle methods of measuring wafer temperature for closed-loop control of rapid thermal processes. The challenge with thermocouples is in dealing with heat from the lamps and non-ideal thermally resistive wafer contact. The challenge with pyrometry is in compensating for the variable emissivity of wafer surfaces and suppressing interference from the lamps. Typical deposited or grown layers of silicon nitride, silicon dioxide, and polycrystalline silicon can produce dramatic changes in emissivity. Layer thicknesses and composition are generally not known with sufficient accuracy, so a method for real time in situ emissivity compensation is required. Accufiber introduced a “ripple technique” to address this issue. The idea is to use two probes, separately sensing radiation from the wafer and the lamps, and extracting AC and quasi-DC parts from each. The AC signals provide a measure of the reflectivity of the wafer, and thence emissivity, as well as the fraction of reflected lamp radiation present in the DC signals. Lucent Technologies introduced a method of using AC lamp ripple to measure wafer temperatures with two radiation probes at a wall in the furnace. One probe views radiation emanating from the wafer through a gap in the lamp array. The other probe has a wide field of view to include lamp radiation. The accuracy of Lucent devices, determined from process results on wafers with various emissivities, is typically in the range of 12°C to 18°C at three standard deviations.

Polysilicon Emitter Transistors Manufactured using a Novel Limited Reaction Processing System

1989 ◽  
Vol 146 ◽  
Author(s):  
Fred Ruddell ◽  
Colin Parkes ◽  
B Mervyn Armstrong ◽  
Harold S Gamble
Keyword(s):  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Processing System ◽  
Bipolar Transistors ◽  
Native Oxide ◽  
Plasma Oxidation ◽  
Oxide Removal ◽  
Polysilicon Emitter ◽  
Reaction Processing

ABSTRACTThis paper describes a LPCVD reactor which was developed for multiple sequential in-situ processing. The system is capable of rapid thermal processing in the presence of plasma stimulation and has been used for native oxide removal, plasma oxidation and silicon deposition. Polysilicon layers produced by the system are incorporated into N-P-N polysilicon emitter bipolar transistors. These devices fabricated using a sequential in-situ plasma clean-polysilicon deposition schedule exhibited uniform gains limited to that of long single crystal emitters. Devices with either plasma grown or native oxide layers below the polysilicon exhibited much higher gains. The suitability of the system for sequential and limited reaction processing has been established.

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