A New Narrow Width Effect in Amorphous Silicon Thin Film Transistors

1992 ◽  
Vol 258 ◽  
Author(s):  
Russel A. Martin

ABSTRACTA new narrow width effect is described for a-Si thin film transistor, TFT, having the inverted staggered structure with source and drain contacts overlapping the edge of the island passivation nitride. In this structure, where the source and drain contacts overlap the edge of the island they contact the a-Si and make a segment of channel effectively shorter. The edges thereby contribute a greater amount to the total drive current, and as width decreases, that fraction increases; what is therefore seen is a channel length effect masquerading as a width effect.The results of measurements down to a width of 3um are given and the effective region of enhanced current is estimated. A SPICE model is presented that allows a simple representation of this effect.

1993 ◽  
Vol 297 ◽  
Author(s):  
Byung Chul Ahn ◽  
Jeong Hyun Kim ◽  
Dong Gil Kim ◽  
Byeong Yeon Moon ◽  
Kwang Nam Kim ◽  
...  

The hydrogenation effect was studied in the fabrication of amorphous silicon thin film transistor using APCVD technique. The inverse staggered type a-Si TFTs were fabricated with the deposited a-Si and SiO2 films by the atmospheric pressure (AP) CVD. The field effect mobility of the fabricated a-Si TFT is 0.79 cm2/Vs and threshold voltage is 5.4V after post hydrogenation. These results can be applied to make low cost a-Si TFT array using an in-line APCVD system.


2018 ◽  
Vol 81 (3) ◽  
pp. 30202 ◽  
Author(s):  
Nawel Arfaoui ◽  
Walid Boukhili ◽  
Mounira Mahdouani ◽  
Joaquim Puigdollers ◽  
Ramzi Bourguiga

In this work, pentacene based thin film transistors (TFTs) with different channel lengths (L = 2.5, 5, 10 and 20 μm) have been fabricated and characterized electrically. Exploiting the electrical characteristics, we have analyzed the channel length effect on the key parameters of fabricated TFTs. We found that the performance of pentacene-TFTs was enormously enhanced by the reduction of channel length .We have also examined the influence of contact and channel resistances (RC and Rch) on the electrical proprieties of fabricated TFTs, using the transmission line method (TLM). Then, we have modeled the dependence of the total resistance RT on the gate voltage VG using the grain boundary trapping Meyer–Neldel rule (GBT-MNR) model and we have successfully reproduced, the output characteristic of pentacene TFTs using the overall resistance extracted from the GBT-MNR model. Finally, in order to investigate the channel length effect on the dynamic behavior of fabricated devices, we have reported a dynamic model based on the quasistatic assumptions which were used for metal-oxide-semiconductor field-effect transistor (MOSFET). Accordingly, we have presented a simple small-signal equivalent circuit to calculate theoretically the capacitances of pentacene-TFTs for different channel lengths.


1992 ◽  
Vol 31 (Part 1, No. 11) ◽  
pp. 3506-3510 ◽  
Author(s):  
Yoshiyuki Kaneko ◽  
Tooru Toyabe ◽  
Toshihisa Tsukada

1994 ◽  
Vol 345 ◽  
Author(s):  
Chul Ha Kim ◽  
Il Lee ◽  
Ki Soo Sohn ◽  
Su Chul Chun ◽  
Jin Jang

AbstractWe have studied the effect of O2 plasma exposure on the performance of polycrystalline silicon (poly-Si) thin film transistor (TFTs). The field effect mobility is increased and the drain currents at negative gate voltages are reduced by O2 plasma exposure on the surface of the TFT. These improvements in the performance of the poly-Si TFTs are larger in offset structure compared to overlap one. We obtained the on/off current ratio of ∼ 108 after O2 plasma exposure for the poly-Si TFTs with 3 or 4 μm offset length.


1998 ◽  
Vol 507 ◽  
Author(s):  
Yue Kuo ◽  
K. Latzko

ABSTRACTPlasma enhanced chemical vapor deposition of phosphorus-doped n+ silicon film over a wide range of process conditions has been studied. The deposited films were characterized with SIMS, Raman, and XRD. An unusually abrupt change of resistivity over a small SiH4(1% PH3) flow rate has been observed and was correlated to the variation of the film's morphology from amorphous to micrycrystalline. The grains are less than 50 Å in size and has strong <111> orientation. Amorphous silicon thin film transistors with microcrystalline n+ source and drain contacts have consistently good device characteristics. However, the contact resistance is comparable to the channel resistance when the channel length approaches 1 micrometer.


1999 ◽  
Vol 557 ◽  
Author(s):  
J.P. Lu ◽  
P. Mei ◽  
C. Chua ◽  
J. Ho ◽  
Y. Wang ◽  
...  

AbstractWe have successfully used self-aligned Amorphous Si Thin-Film Transistors, fabricated by a laser doping/annealing process, to construct dynamic shift register circuits, which can be used as gate-line drivers or in other peripheral circuits for flat-panel displays and imagers. Taking advantage of easily scaling down the TFT channel length in a self-aligned process, much higher circuit speeds can be achieved compared to that of circuits using conventional TFTs. We have successfully demonstrated a four-phase dynamic shift register, operating at a clock speed higher that 250 kHz (1 μs for each clock phase) built on 3 μm channel length TFTs. This new technology opens up possibilities for integrating peripheral circuits in flat-panel displays and imagers based on a-Si TFTs.


2008 ◽  
Vol 52 (9) ◽  
pp. 1345-1352 ◽  
Author(s):  
A. Baiano ◽  
M. Danesh ◽  
N. Saputra ◽  
R. Ishihara ◽  
J. Long ◽  
...  

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