Ultrahigh ON/Off Current Ratio γ-Graphyne-1 Nanotube Based Sub 10 nm TFET Modeling and Simulation

Utilizing γ-graphyne-1 nanotubes (GyNTs) in the Tunneling Field Effect Transistors (TFETs) suppresses ambipolarity and enhances subthreshold swing (SS) of TFETs which is because of large energy band gap and high electron effective mass of GyNTs. In this research analysis of structural, electronic and thermoelectric properties of γ-graphyne-1 family under the deformation potential (DP) approach reveals that electron-phonon mean free path (MFP) of an Armchair GyNT (3AGyNT) and Zigzag GyNT (2ZGyNT) are 45 and 290 nm, respectively. Therefore, ballistic transport of sub 10 nm 3AGyNT-TFETs and 2ZGyNT-TFETs in different channel lengths are investigated utilizing Non-Equilibrium Green’s Function (NEGF) formalism in the DFTB platform. Ultrahigh Current Ratio (OOCR) value of 1.6 x 1010 at VDD = 0.2 V and very low point SS of 5 mV/dec are belonged to the 3AGyNT-TFET with channel length of 9.6 nm. 2ZGyNT-TFETs shows higher on-state current and SS as well as lower OOCR than those of 3AGyNT-TFETs. A linear relationship between channel length and logarithmic off-state current is reported that is consistent with WKB approximation. The obtained results along with the ultralow power consumption of the suggested GyNT-TFETs, make them as replacement of digital silicon MOSFETs in the next generation nanoelectronic devices.

Исследование гидродинамического сопротивления щелевого микроканала с текстурированной стенкой

The results of numerical investigation of the hydrodynamic drag of a slit microchannel with a textured wall surface, as well as the pressure drop in such a channel and the effective slip length on the wall for various Reynolds numbers, are presented. The channel height was 10 µm, and the length varied from 25 to 500 µm. It was found that the pressure drop in the textured microchannel was less than in a conventional channel for any of its lengths. The dependences of the relative pressure drop, the friction factor, and the effective slip length on the Reynolds number were obtained for various channel lengths. A correlation that describes the dependence of the relative pressure drop on the Reynolds number for small channel lengths was proposed. The friction factor is described by a correlation of form 20 / Re.

Junctionless Accumulation Mode Ferroelectric FET (JAM-FE-FET) for High Frequency Digital and Analog applications

In this paper, a Junctionless Accumulation Mode Ferroelectric Field Effect Transistor (JAM-FE-FET) has been proposed and assessed in terms of RF/analog specifications for varied channel lengths through simulations using TCAD Silvaco ATLAS simulator, using the Shockley-Read-Hall (SRH) recombination, ferro, Lombardi CVT, fermi and LK models. Major analog metrics like transconductance (gm), intrinsic gain (AV), output conductance (gd), and early voltage (VEA) are obtained for the JAM-FE-FET arrangement. The proposed structure shows an improvement in parameters like gm, Ion/Ioff, Av, TGF by 6.82%, 27.95%, 5.2%, 38.83% respectively. Further, frequency analysis of the proposed device is performed and several critical RF parameters like fT, TFP, GFP, and GTFP have been observed to be enhanced by 6.89%, 11.38%, 13.65%, 12.01% respectively. Thus, the Junctionless accumulation mode ferroelectric FET (JAM-FE-FET) arrangement has been found to have superior analog and RF performance when compared to Junctionless ferroelectric FET(JL-FE-FET). As a result, the JAM-FE-FET device presented here can be contemplated a good contender for applications in high-frequency systems.

New Simulation Method for Dependency of Device Degradation on Bending Direction and Channel Length

The dependency of device degradation on bending direction and channel length is analyzed in terms of bandgap states in amorphous indium-gallium-zinc-oxide (a-IGZO) films. The strain distribution in an a-IGZO film under perpendicular and parallel bending of a device with various channel lengths is investigated by conducting a three-dimensional mechanical simulation. Based on the obtained strain distribution, new device simulation structures are suggested in which the active layer is defined as consisting of multiple regions. The different arrangements of a highly strained region and density of states is proportional to the strain account for the measurement tendency. The analysis performed using the proposed structures reveals the causes underlying the effects of different bending directions and channel lengths, which cannot be explained using the existing simulation methods in which the active layer is defined as a single region.

Fluidic Oscillators, Feedback Channel Effect under Compressible Flow Conditions

Fluidic oscillators are often used to modify the forces fluid generates on any given bluff body; they can also be used as flow, pressure or acoustic sensors, with each application requiring a particular oscillator configuration. Regarding the fluidic oscillators’ main performance, a problem which is not yet clarified is the understanding of the feedback channel effect on the oscillator outlet mass flow frequency and amplitude, especially under compressible flow conditions. In order to bring light to this point, a set of three-dimensional Direct Numerical Simulations under compressible flow conditions are introduced in the present paper; four different feedback channel lengths and two inlet Reynolds numbers Re = 12,410 and Re = 18,617 are considered. From the results obtained, it is observed that as the inlet velocity increases, the fluidic oscillator outlet mass flow frequency and amplitude increase. An increase of the feedback channel length decreases the outlet mass flow oscillating frequency. At large feedback channel lengths, the former main oscillation tends to disappear, the jet inside the mixing chamber simply fluctuates at high frequencies. Once the Feedback Channel (FC) length exceeds a certain threshold, the oscillation stops. Under all conditions studied, pressure waves are observed to be traveling along the feedback channels, their origin and interaction with the jet entering the mixing chamber are thoroughly evaluated. The paper proves that jet oscillations are pressure-driven.

Monolithic optical microlithography of high-density elastic circuits

Polymeric electronic materials have enabled soft and stretchable electronics. However, the lack of a universal micro/nanofabrication method for skin-like and elastic circuits results in low device density and limited parallel signal recording and processing ability relative to silicon-based devices. We present a monolithic optical microlithographic process that directly micropatterns a set of elastic electronic materials by sequential ultraviolet light–triggered solubility modulation. We fabricated transistors with channel lengths of 2 micrometers at a density of 42,000 transistors per square centimeter. We fabricated elastic circuits including an XOR gate and a half adder, both of which are essential components for an arithmetic logic unit. Our process offers a route to realize wafer-level fabrication of complex, high-density, and multilayered elastic circuits with performance rivaling that of their rigid counterparts.

Si–OH Nest and Al Distribution of Silicalite-1 Core/Al-ZSM-5 Shell Zeolites for Methane Dehydroaromatization Reaction

Silicalite-1 core/Al-ZSM-5 shell zeolite crystals were prepared in various sizes for use as catalysts in methane dehydroaromatization (MDA), and the growth kinetics and corresponding physicochemical properties of this core–shell zeolite were investigated. Al-ZSM-5 was grown on silicalite-1 seeds at various Si/Al ratios. Core–shell catalysts of all size variations exhibited similar deactivation trends in the MDA reaction, with minor changes in aromatic yields despite clear differences in reaction channel lengths and acid-site properties. This outcome was shown to originate from the unique growth kinetics of the Al-ZSM-5 layer on silicalite-1 seeds, in which the Al species in the sol used in the synthesis were consumed quickly during the early aggregative growth period. This led to an interesting spatial distribution of Al in the Al-ZSM-5 layer, in that the inner layer was relatively Al-rich. This distribution is advantageous because it can inhibit coke deactivation, which often occurs at the catalyst surface during MDA. However, a substantial quantity of Si–OH nests, which inhibit the effective loading of Mo species at the acid sites of the crystals, were detected in the microstructural analysis of large crystals. Therefore, this study shows that silicalite-1 core/Al-ZSM-5 shell zeolites can be prepared for use as coke-resistant catalysts for the MDA reaction. Further work is required, however, to design a synthesis method which reduces the number of Si–OH nests formed.

Emerging Tunnel FET and Spintronics based Hardware Secure Circuit Design with Ultra-low Energy Consumption

Present CMOS technology with scaled channel lengths exhibited higher energy consumption in designing secure electronic circuits against hardware vulnerabilities and breaches. Specifically, CMOS sense amplifier based secure differential power analysis (DPA) countermeasures at scaled channel lengths show large energy consumption with increased vulnerability. Additionally, spin transfer torque magnetic tunnel junction (STT-MTJ) and CMOS based logic-in-memory (LiM) cells demonstrate high energy consumption due to the large write current requirement of STT-MTJ and poor MOS device performance at scaled channel lengths. This paper for the first time leverages emerging tunnel FET (TFET) steep-slope device characteristics and compatible non-volatile STT-MTJ devices for enhanced hardware security with ultra-low energy consumption at lower supply voltages. TFET based sense amplifier based logic (SABL) gates have been proposed that achieve 3× lower energy consumption compared to Si FinFET SABL designs. Further, utilizing TFET SABL gates, TFET Pride S-box is designed that exhibits higher DPA resilience with 3.2× lower energy consumption compared to FinFET designs. With resulted lower static power consumption, TFET SABL based crypto systems can show lower vulnerability to static power side-channel attacks. Besides, proposed STT-MTJ and TFET LiM gates achieves 4× lower energy consumption compared to STT-MTJ and FinFET designs. Moreover, these gates have been explored in logic encryption/locking technique that shows 3.1× lower energy consumption compared to STT-MTJ and FinFET based design.

Coupled NEGF-PSO Method for Maximizing the Current Ratio of CNTFETs Based on Oxide Thickness Optimization

Carbon nanotube field-effect transistors (CNTFETs) with optimized oxide thicknesses have been proposed. The optimum oxide thickness that provides the maximum current ratio (on/off ratio) has been calculated for each design. The effect of oxide thickness on the on/off ratio has been investigated by changing its value as the independent variable and calculating on state and off state currents. PSO algorithm has been used to find the exact optimum value of the oxide thickness with the objective of having a maximum current ratio that is one of the most important parameters in switching applications. The optimum insulator thickness is calculated for CNTFETs with different chiral vectors, insulator types, channel lengths and source/drain doping levels. For further study of the CNTFETs, performance parameters such as cutoff frequency and transconductance of the devices have also been calculated and studied. The results of the paper show that the CNTFET designers should select the oxide thickness very carefully not only based on reported values in other works. Each design requires its own optimum oxide thickness which provides the maximum on/off current ratio only for that design.