High-Temperature Operation of Pentacene Field-Effect Transistors with Polyimide Gate Insulators

2005 ◽  
Vol 871 ◽  
Author(s):  
Tsuyoshi Sekitani ◽  
Shingo Iba ◽  
Yusaku Kato ◽  
Yoshiaki Noguchi ◽  
Takao Someya ◽  
...  
Keyword(s):  
High Temperature ◽  
Field Effect ◽  
Room Temperature ◽  
Gate Dielectric ◽  
Field Effect Transistors ◽  
Current Ratio ◽  
Excellent Thermal Stability ◽  
Annealing Temperatures ◽  
High Temperature Operation ◽  
Thermal Stability Of

AbstractWe have fabricated pentacene field-effect transistors (FETs) on polyimide-sheet films with polyimide gate dielectric layers and parylene encapsulation layer, and investigated the high-temperature performance. It is found that the mobility of encapsulated FETs is enhanced from 0.5 to 0.8 cm2/Vs when the device is heated from room temperature to 160°C under light-shielding nitrogen environment. Furthermore, after the removal of annealing temperatures up to 160°C, the transistor characteristic of mobility and on/off current ratio show no significant changes, demonstration the excellent thermal stability of the present organic FETs.

Extended High-Temperature Operation of Silicon Carbide CMOS Circuits for Venus Surface Application

2016 ◽  
Vol 13 (4) ◽  
pp. 143-154 ◽  
Author(s):  
Jim Holmes ◽  
A. Matthew Francis ◽  
Ian Getreu ◽  
Matthew Barlow ◽  
Affan Abbasi ◽  
...  
Keyword(s):  
High Temperature ◽  
Integrated Circuits ◽  
Integrated Circuit ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Logic Synthesis ◽  
Oxide Semiconductor ◽  
Cmos Process ◽  
Timing Models ◽  
High Temperature Operation

In the last decade, significant effort has been expended toward the development of reliable, high-temperature integrated circuits. Designs based on a variety of active semiconductor devices including junction field-effect transistors and metal-oxide-semiconductor (MOS) field-effect transistors have been pursued and demonstrated. More recently, advances in low-power complementary MOS (CMOS) devices have enabled the development of highly integrated digital, analog, and mixed-signal integrated circuits. The results of elevated temperature testing (as high as 500°C) of several building block circuits for extended periods (up to 100 h) are presented. These designs, created using the Raytheon UK's HiTSiC® CMOS process, present the densest, lowest-power integrated circuit technology capable of operating at extreme temperatures for any period. Based on these results, Venus nominal temperature (470°C) transistor models and gate-level timing models were created using parasitic extracted simulations. The complete CMOS digital gate library is suitable for logic synthesis and lays the foundation for complex integrated circuits, such as a microcontroller. A 16-bit microcontroller, based on the OpenMSP 16-bit core, is demonstrated through physical design and simulation in SiC-CMOS, with an eye for Venus as well as terrestrial applications.

High-Temperature Operation of Normally Off-Mode AlGaN/GaN Heterostructure Field-Effect Transistors with p-GaN Gate

2011 ◽  
Vol 50 (1S1) ◽  
pp. 01AD03 ◽  
Author(s):  
Takayuki Sugiyama ◽  
Hiroshi Amano ◽  
Daisuke Iida ◽  
Motoaki Iwaya ◽  
Satoshi Kamiyama ◽  
...  
Keyword(s):  
High Temperature ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Heterostructure Field Effect Transistors ◽  
Gan Heterostructure ◽  
High Temperature Operation

Field-effect Transistors of Tetracene Single Crystal on top of a Flexible Substrate

2006 ◽  
Vol 920 ◽  
Author(s):  
Tae-Heon Kim ◽  
Joon Ho Lee ◽  
Jin heon Kim ◽  
Chang Seoul
Keyword(s):  
Single Crystal ◽  
Field Effect ◽  
Room Temperature ◽  
Gate Dielectric ◽  
Field Effect Transistors ◽  
Flexible Substrate ◽  
Polyimide Films ◽  
Crystal Field Effect ◽  
Transport Method ◽  
Better Than

AbstractTetracene single crystals were prepared by the vapor transport method. The polyimide films were used for both substrate and gate dielectric layer. The single-crystal FETs should perform better than thin film transistors. Very thin crystals (~1 μm) were adhered to the substrate by due to electrostatic forces. The mobility of tetracene single-crystal field-effect transistors reaches the room-temperature value of 5×10-4 cm2/Vs.

High-Temperature Operation of Diamond Junction Field-Effect Transistors With Lateral p-n Junctions

2013 ◽  
Vol 34 (9) ◽  
pp. 1175-1177 ◽  
Author(s):  
Takayuki Iwasaki ◽  
Yuto Hoshino ◽  
Kohei Tsuzuki ◽  
Hiromitsu Kato ◽  
Toshiharu Makino ◽  
...  
Keyword(s):  
High Temperature ◽  
Field Effect ◽  
Field Effect Transistors ◽  
High Temperature Operation ◽  
Junction Field Effect Transistors

High temperature operation of n-AlGaN channel metal semiconductor field effect transistors on low-defect AlN templates

2017 ◽  
Vol 110 (19) ◽  
pp. 193501 ◽  
Author(s):  
S. Muhtadi ◽  
S. Hwang ◽  
A. Coleman ◽  
F. Asif ◽  
A. Lunev ◽  
...  
Keyword(s):  
High Temperature ◽  
Field Effect ◽  
Field Effect Transistors ◽  
High Temperature Operation

scholarly journals Graphene Field-Effect Transistors with High On/Off Current Ratio and Large Transport Band Gap at Room Temperature

Nano Letters ◽  
2010 ◽  
Vol 10 (2) ◽  
pp. 715-718 ◽  
Author(s):  
Fengnian Xia ◽  
Damon B. Farmer ◽  
Yu-ming Lin ◽  
Phaedon Avouris
Keyword(s):  
Band Gap ◽  
Field Effect ◽  
Room Temperature ◽  
Field Effect Transistors ◽  
Current Ratio
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