Gate-on-drain overlapped L-shaped channel Tunnel FET as label-free biosensor

Author(s):  
Suman Das ◽  
Bikash Sharma

Abstract In this manuscript gate-on-drain L-shaped channel Tunnel FET is proposed to detect various biomolecules through label-free bio-sensing detection technique. Biomolecules can be detected in the proposed structure through modulating ambipolar current between channel and drain by overlapping gate on drain thus creating a cavity. Trapped biomolecules within cavity gets immobilized. Immobilized biomolecules change the drain to channel tunneling width, thus changing the ambiploar leakage current. Drain doping and cavity length was fine-tuned to achieve better sensitivity in terms of ambipolar current and ambipolar knee voltage shift with and without presence of biomolecules. A maximum sensitivity of 3.8×107 is achieved for drain doping of 5×1019 donors/cm3 and cavity length of 60nm. A high value of sensitivity is achieved for each biomolecules when drain doping ranged from 1019 donors/cm3 to 5×1019 donors/cm3 and cavity length ranged between 40nm to 50nm. Effect of differently charged biomolecules on sensitivity has also be structured.

Silicon ◽  
2021 ◽  
Author(s):  
Shashi Bala ◽  
Harpal Singh ◽  
Priyanka Kamboj ◽  
Balwant Raj

2014 ◽  
Vol 5 (11) ◽  
pp. 4375-4381 ◽  
Author(s):  
Yan Guan ◽  
Xiaonan Shan ◽  
Shaopeng Wang ◽  
Peiming Zhang ◽  
Nongjian Tao

We report a charge sensitive optical detection technique for the label-free study of molecular interactions.


2018 ◽  
Vol 13 (4) ◽  
pp. 452-456 ◽  
Author(s):  
Bandi Venkata Chandan ◽  
Kaushal Nigam ◽  
Dheeraj Sharma

2011 ◽  
Vol 58 (6) ◽  
pp. 1649-1654 ◽  
Author(s):  
Costin Anghel ◽  
Hraziia ◽  
Anju Gupta ◽  
Amara Amara ◽  
Andrei Vladimirescu

Micromachines ◽  
2020 ◽  
Vol 11 (11) ◽  
pp. 960
Author(s):  
Jun Li ◽  
Ying Liu ◽  
Su-fen Wei ◽  
Chan Shan

In this paper, we present an in-built N+ pocket electrically doped tunnel FET (ED-TFET) based on the polarity bias concept that enhances the DC and analog/RF performance. The proposed device begins with a MOSFET like structure (n-p-n) with a control gate (CG) and a polarity gate (PG). The PG is biased at −0.7 V to induce a P+ region at the source side, leaving an N+ pocket between the source and the channel. This technique yields an N+ pocket that is realized in the in-built architecture and removes the need for additional chemical doping. Calibrated 2-D simulations have demonstrated that the introduction of the N+ pocket yields a higher ION and a steeper average subthreshold swing when compared to conventional ED-TFET. Further, a local minimum on the conduction band edge (EC) curve at the tunneling junction is observed, leading to a dramatic reduction in the tunneling width. As a result, the in-built N+ pocket ED-TFET significantly improves the DC and analog/RF figure-of-merits and, hence, can serve as a better candidate for low-power applications.


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