A Single-Supply Single-Core Inverse Class-D Digital Power Amplifier with Enhanced Power Back-Off Efficiency Adopting Output Power Scaling Technique

This work presents a compact on-chip outphasing power amplifier with a parallel-combining transformer (PCT). A series-combining transformer (SCT) and PCT are analyzed as power-combining transformers for outphasing operations. Compared to the SCT, which is typically used for on-chip outphasing combiners, the PCT is much smaller. The outphasing operations of the transformer combiners and class-D switching PAs are also analyzed. A tuning inductor method is proposed to improve the efficiency of class-D power amplifiers (PAs) with power-combining transformers in the out-of-phase mode. The proposed PA was implemented with a standard 0.18 µm CMOS process. The measured maximum drain efficiency is 37.3% with an output power of 22.4 dBm at 1.7 GHz. A measured adjacent channel leakage ratio (ACLR) of less than −30 dBc is obtained for a long-term evolution (LTE) signal with a bandwidth of 10 MHz.

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A High-Voltage Class-D Power Amplifier With Switching Frequency Regulation for Improved High-Efficiency Output Power Range

IEEE Journal of Solid-State Circuits ◽

10.1109/jssc.2015.2421994 ◽

2015 ◽

Vol 50 (6) ◽

pp. 1451-1462 ◽

Cited By ~ 9

Author(s):

Haifeng Ma ◽

Ronan van der Zee ◽

Bram Nauta

Keyword(s):

Output Power ◽

Power Amplifier ◽

High Voltage ◽

High Efficiency ◽

Frequency Regulation ◽

Switching Frequency ◽

Class D

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High-Fidelity and High-Efficiency Digital Class-D Audio Power Amplifier

Journal of Electrical and Computer Engineering ◽

10.1155/2021/5533745 ◽

2021 ◽

Vol 2021 ◽

pp. 1-10

Author(s):

Cong Wei ◽

Jianhan Wu ◽

Rongshan Wei ◽

Minghua He

Keyword(s):

Output Power ◽

Power Amplifier ◽

High Efficiency ◽

Harmonic Distortion ◽

Utilization Rate ◽

High Fidelity ◽

Digital To Analog Converter ◽

Interpolation Filter ◽

Class D ◽

Pulse Width Modulator

This study presents a high-fidelity and high-efficiency digital class-D audio power amplifier (CDA), which consists of digital and analog modules. To realize a compatible digital input, a fully digital audio digital-to-analog converter (DAC) is implemented on MATLAB and Xilinx System Generator, which consists of a 16x interpolation filter, a fourth-order four-bit quantized delta-sigma (ΔΣ) modulator, and a uniform-sampling pulse width modulator. The CDA utilizes the closed-loop negative feedback and loop-filtering technologies to minimize distortion. The audio DAC, which is based on a field-programmable gate array, consumes 0.128 W and uses 7100 LUTs, which achieves 11.2% of the resource utilization rate. The analog module is fabricated in a 0.18 µm BCD technology. The postlayout simulation results show that the CDA delivers an output power of 1 W with 93.3% efficiency to a 4 Ω speaker and achieves 0.0138% of the total harmonic distortion (THD) with a transient noise for a 1 kHz input sinusoidal test tone and 3.6 V supply. The output power reaches up to 2.73 W for 1% THD (with transient noise). The proposed amplifier occupies an active area of 1 mm2.

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A voltage-mode class-S power amplifier for the 450 MHz band

International Journal of Microwave and Wireless Technologies ◽

10.1017/s175907871100002x ◽

2011 ◽

Vol 3 (3) ◽

pp. 311-318 ◽

Cited By ~ 2

Author(s):

Andreas Wentzel ◽

Chafik Meliani ◽

Wolfgang Heinrich

Keyword(s):

Integrated Circuits ◽

Output Power ◽

Power Amplifier ◽

Maximum Output Power ◽

Maximum Output ◽

Voltage Mode ◽

Coding Efficiency ◽

Peak Output Power ◽

Delta Sigma ◽

Class D

This paper reports on a novel voltage-mode class-S power amplifier for the 450 MHz band, based on GaN–HEMT monolithic microwave integrated circuits (MMICs). It achieves a peak output power of 3.4 W for a single tone at 400 MHz, encoded in standard band-pass delta-sigma modulation with 1.6 Gbps sampling frequency. The corresponding efficiency is 38%, peaking at 52% for 0.5 W output power. In order to demonstrate the influence of coding efficiency, additional measurements using a periodic square-wave signal were performed (class-D operation), which yield a maximum output power of 7 W with 64% efficiency. To the author's knowledge, these are the best results in this frequency range achieved so far with the voltage-mode class-S configuration. The paper discusses behavior at power back-off and the influence of the loss mechanisms.

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Failure Localization in a Multistage S-Band Power Amplifier

ISTFA 2016: Conference Proceedings from the 42nd International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2016p0373 ◽

2016 ◽

Author(s):

Clarence Rebello ◽

Ted Kolasa ◽

Parag Modi

Keyword(s):

Output Power ◽

Power Amplifier ◽

Fault Tree ◽

Root Cause ◽

Failure Investigation ◽

Band Power ◽

Cause Of Failure ◽

Design Materials ◽

Board Level ◽

Failure Localization

Abstract During the search for the root cause of a board level failure, all aspects of the product must be revisited and investigated. These aspects encompass design, materials, and workmanship. In this discussion, the failure investigation involved an S-Band Power Amplifier assembly exhibiting abnormally low RF output power where initial troubleshooting did not provide a clear cause of failure. A detailed fault tree drove investigations that narrowed the focus to a few possible root causes. However, as the investigation progressed, multiple contributors were eventually discovered, some that were not initially considered.

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РАЗРАБОТКА СВЧ МОНОЛИТНЫХ ИНТЕГРАЛЬНЫХ СХЕМ МИЛЛИМЕТРОВОГО ДИАПАЗОНА НА ОСНОВЕ GAAS ДЛЯ ПРИМЕНЕНИЯ В СОВРЕМЕННЫХ ИНФОРМАЦИОННОКОММУНИКАЦИОННЫХ СИСТЕМАХ НОВОГО ПОКОЛЕНИЯ (5G)

Nanoindustry Russia ◽

10.22184/1993-8578.2020.13.3s.321.324 ◽

2020 ◽

Vol 96 (3s) ◽

pp. 321-324

Author(s):

Е.В. Ерофеев ◽

Д.А. Шишкин ◽

В.В. Курикалов ◽

А.В. Когай ◽

И.В. Федин

Keyword(s):

Output Power ◽

Power Amplifier ◽

Integrated Circuit ◽

Phase Shifter ◽

Phase Error ◽

Microwave Integrated Circuit ◽

Gain Compression ◽

Monolithic Microwave Integrated Circuit ◽

And Performance ◽

Power Capability

В данной работе представлены результаты разработки СВЧ монолитной интегральной схемы шестиразрядного фазовращателя и усилителя мощности диапазона частот 26-30 ГГц. СКО ошибки по фазе и амплитуде фазовращателя составили 1,2 град. и 0,13 дБ соответственно. Максимальная выходная мощность и КПД по добавленной мощности усилителя в точке сжатия Ку на 1 дБ составили 30 дБм и 20 % соответственно. This paper describes the design, layout, and performance of 6-bit phase shifter and power amplifier monolithic microwave integrated circuit (MMIC), 26-30 GHz band. Phase shifter MMIC has RMS phase error of 1.2 deg. And RMD amplitude error is 0.13 dB. MMIC power amplifier has output power capability of 30 dBm at 1 dB gain compression (P-1dB) and PAE of 20 %.

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