scholarly journals FPGA Implementation for Rapid Prototyping of High Performance Voltage Source Inverters

2021 ◽  
Vol 6 (4) ◽  
pp. 320-331
Author(s):  
Yukun Luo ◽  
Keyword(s):  
Rapid Prototyping ◽  
Power Electronics ◽  
Code Generation ◽  
Digital Signal Processor ◽  
High Performance ◽  
Controller Design ◽  
Digital Signal ◽  
Current Control ◽  
Voltage Source ◽  
High Level

Field-programmable gate array (FPGA) is a powerful platform that can play an essential role in high-performance digital control of power electronics systems. However, the FPGA system’s design is quite different from that of a traditional microprocessor or a digital signal processor (DSP). Instead of sequential programming using high-level languages, such as C/C++, FPGA controller implementation requires a hardware description language (HDL) such as Verilog and VHDL, which requires extensive verification and optimization during the design process. This paper proposes a systematic FPGA design methodology with optimum resource utilization for rapid prototyping of high-performance power electronics applications to facilitate the widespread adoption of FPGA technology in power electronics. The FPGA controller design is concurrent with the power stage and utilizes high-level synthesis (HLS) tools and Simulink code generation toolbox. This paper covers the detailed design, implementation, and experimental validation of two specific applications, i.e., an active power filter (APF) and a motor emulator (ME), demonstrating the generalized features of the methodology. Employing fundamentally different control structures, both application examples achieve ultra-high current control bandwidth leveraging SiC MOSFETs switching at no less than 100 kHz.

An Improved Predictive Current Control Scheme for Three-phase Voltage Source Converters

2016 ◽  
Vol 25 (11) ◽  
pp. 1650133 ◽  
Author(s):  
Meng Wang ◽  
Yanyan Shi
Keyword(s):  
Digital Signal Processor ◽  
Dynamic Performance ◽  
Digital Signal ◽  
Sampling Interval ◽  
Current Control ◽  
Voltage Source ◽  
Calculation Time ◽  
Pwm Converters ◽  
Three Phase ◽  
Control Scheme

For a fully digital control of PWM converters, considerable research has been done based on the predictive current control (PCC) scheme. However, it requires a large amount of calculation in the step of experimental implementation. Besides, when compared with the classical linear control scheme, the sampling interval of the PCC scheme must be shorter to obtain the same control performance for current. Due to this, a digital signal processor with excellent performance is required. This paper proposes an improved simplified model PCC scheme for three-phase PWM converters. The main objective is to simplify the PCC scheme. Also, the proposed control scheme is able to reduce the calculation time without affecting the performance. Simulations and experiments are carried out to investigate the presented novel predictive current control scheme. The results indicate that the three-phase PWM converter has excellent static and dynamic performance with the proposed scheme. Besides, the calculation time can be obviously shortened.

scholarly journals SHIL and DHIL Simulations of Nonlinear Control Methods Applied for Power Converters Using Embedded Systems

Electronics ◽  
2018 ◽  
Vol 7 (10) ◽  
pp. 241 ◽  
Author(s):  
Arthur Rosa ◽  
Matheus Silva ◽  
Marcos Campos ◽  
Renato Santana ◽  
Welbert Rodrigues ◽  
...  
Keyword(s):  
Embedded Systems ◽  
Nonlinear Control ◽  
Real Time ◽  
Digital Signal Processor ◽  
High Performance ◽  
Power Converters ◽  
Digital Signal ◽  
Simulation Method ◽  
Hardware In The Loop ◽  
Control Techniques

In this work, a new real-time Simulation method is designed for nonlinear control techniques applied to power converters. We propose two different implementations: in the first one (Single Hardware in The Loop: SHIL), both model and control laws are inserted in the same Digital Signal Processor (DSP), and in the second approach (Double Hardware in The Loop: DHIL), the equations are loaded in different embedded systems. With this methodology, linear and nonlinear control techniques can be designed and compared in a quick and cheap real-time realization of the proposed systems, ideal for both students and engineers who are interested in learning and validating converters performance. The methodology can be applied to buck, boost, buck-boost, flyback, SEPIC and 3-phase AC-DC boost converters showing that the new and high performance embedded systems can evaluate distinct nonlinear controllers. The approach is done using matlab-simulink over commodity Texas Instruments Digital Signal Processors (TI-DSPs). The main purpose is to demonstrate the feasibility of proposed real-time implementations without using expensive HIL systems such as Opal-RT and Typhoon-HL.

PARALLEL ALGORITHMS FOR ADAPTIVE MATCHED-FIELD PROCESSING ON DISTRIBUTED ARRAY SYSTEMS

2004 ◽  
Vol 12 (02) ◽  
pp. 149-174 ◽  
Author(s):  
KILSEOK CHO ◽  
ALAN D. GEORGE ◽  
RAJ SUBRAMANIYAN ◽  
KEONWOOK KIM
Keyword(s):  
Parallel Algorithms ◽  
Real Time ◽  
Digital Signal Processor ◽  
High Performance ◽  
Digital Signal ◽  
Minimum Variance ◽  
Adaptive Beamforming ◽  
Matched Field Processing ◽  
Minimum Variance Distortionless Response ◽  
Distributed Array

Matched-field processing (MFP) localizes sources more accurately than plane-wave beamforming by employing full-wave acoustic propagation models for the cluttered ocean environment. The minimum variance distortionless response MFP (MVDR–MFP) algorithm incorporates the MVDR technique into the MFP algorithm to enhance beamforming performance. Such an adaptive MFP algorithm involves intensive computational and memory requirements due to its complex acoustic model and environmental adaptation. The real-time implementation of adaptive MFP algorithms for large surveillance areas presents a serious computational challenge where high-performance embedded computing and parallel processing may be required to meet real-time constraints. In this paper, three parallel algorithms based on domain decomposition techniques are presented for the MVDR–MFP algorithm on distributed array systems. The parallel performance factors in terms of execution times, communication times, parallel efficiencies, and memory capacities are examined on three potential distributed systems including two types of digital signal processor arrays and a cluster of personal computers. The performance results demonstrate that these parallel algorithms provide a feasible solution for real-time, scalable, and cost-effective adaptive beamforming on embedded, distributed array systems.

scholarly journals A flexible user-interface for audiovisual presentation and interactive control in neurobehavioral experiments

F1000Research ◽  
2013 ◽  
Vol 2 ◽  
pp. 20
Author(s):  
Christopher T Noto ◽  
Suleman Mazhar ◽  
James Gnadt ◽  
Jagmeet S Kanwal
Keyword(s):  
User Interface ◽  
Data Acquisition ◽  
Digital Signal Processor ◽  
Digital Signal ◽  
Stimulus Presentation ◽  
Cost Effective ◽  
Level Control ◽  
Interactive Control ◽  
High Level ◽  
Behavioral Monitoring

A major problem facing behavioral neuroscientists is a lack of unified, vendor-distributed data acquisition systems that allow stimulus presentation and behavioral monitoring while recording neural activity. Numerous systems perform one of these tasks well independently, but to our knowledge, a useful package with a straightforward user interface does not exist. Here we describe the development of a flexible, script-based user interface that enables customization for real-time stimulus presentation, behavioral monitoring and data acquisition. The experimental design can also incorporate neural microstimulation paradigms. We used this interface to deliver multimodal, auditory and visual (images or video) stimuli to a nonhuman primate and acquire single-unit data. Our design is cost-effective and works well with commercially available hardware and software. Our design incorporates a script, providing high-level control of data acquisition via a sequencer running on a digital signal processor to enable behaviorally triggered control of the presentation of visual and auditory stimuli. Our experiments were conducted in combination with eye-tracking hardware. The script, however, is designed to be broadly useful to neuroscientists who may want to deliver stimuli of different modalities using any animal model.

scholarly journals Optimizing Convolution Neural Network on the TI C6678 multicore DSP

2018 ◽  
Vol 246 ◽  
pp. 03044 ◽  
Author(s):  
Guozhao Zeng ◽  
Xiao Hu ◽  
Yueyue Chen
Keyword(s):  
Neural Network ◽  
Neural Networks ◽  
Image Processing ◽  
Deep Learning ◽  
Digital Signal Processor ◽  
High Performance ◽  
Digital Signal ◽  
Automatic Translation ◽  
Convolution Operation ◽  
Multicore Dsp

Convolutional Neural Networks (CNNs) have become the most advanced algorithms for deep learning. They are widely used in image processing, object detection and automatic translation. As the demand for CNNs continues to increase, the platforms on which they are deployed continue to expand. As an excellent low-power, high-performance, embedded solution, Digital Signal Processor (DSP) is used frequently in many key areas. This paper attempts to deploy the CNN to Texas Instruments (TI)’s TMS320C6678 multi-core DSP and optimize the main operations (convolution) to accommodate the DSP structure. The efficiency of the improved convolution operation has increased by tens of times.

Corroboration of Normalized Least Mean Square Based Adaptive Selective Current Harmonic Elimination in Voltage Source Inverter using DSP Processor

2015 ◽  
Vol 6 (1) ◽  
pp. 178
Author(s):  
P. Avirajamanjula ◽  
P. Palanivel
Keyword(s):  
Induction Motor ◽  
Digital Signal Processor ◽  
Digital Signal ◽  
Voltage Source ◽  
Phase Voltage ◽  
Voltage Source Inverter ◽  
Load Current ◽  
Current Harmonic ◽  
Harmonic Elimination ◽  
Three Phase

A direct Selective current harmonic elimination pulse width modulation technique is proposed for induction motor drive fed from voltage source inverter. The developed adaptive filtering algorithm for the selective current harmonic elimination in a three phase Voltage Source Inverter is a direct method to improve the line current quality of the Voltage Source Inverter base drive at any load condition. The self-adaptive algorithm employed has the capability of managing the time varying nature of load (current). The proposed Normalized Least Mean Squares algorithm based scheme eliminates the selected dominant harmonics in load current using only the knowledge of the frequencies to be eliminated. The algorithm is simulated using Matlab/Simulink tool for a three-phase Voltage Source Inverter to eliminate the fifth and seventh harmonics. The system performance is analyzed based on the simulation results considering total harmonic distortion, magnitude of eliminated harmonics and harmonic spectrum. The corroboration is done in the designed Voltage Source Inverter feeding induction motor using digital signal processor-TMS320L2812.The developed algorithm is transferred to digital signal processor using VisSim<sup>TM</sup> software.

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