scholarly journals Development of a PXI Express Peripheral Module and Data Transfer Platform

2021 ◽  
Author(s):  
◽  
Mathew David Bourne

<p>Magritek, a company who specialise in NMR and MRI devices, required a new backplane communication solution for transmission of data. Possible options were evaluated and it was decided to move to the PXI Express instrumentation standard. As a first step of moving to this system, an FPGA based PXI Express Peripheral Module was designed and constructed. In order to produce this device, details on PXI Express boards and the signals required were researched, and schematics produced. These were then passed onto the board designer who incorporated the design with other design work at Magritek to produce a PXI Express Peripheral Module for use as an NMR transceiver board. With the board designed, the FPGA was configured to provide PXI Express functionality. This was designed to allow PCI Express transfers at high data speeds using Direct Memory Access (DMA). The PXI Express Peripheral board was then tested and found to function correctly, providing Memory Write speeds of 228 MB/s and Memory Read speeds of 162 MB/s. Also, to provide a test system for this physical and FPGA design, backplanes were designed to test communication between PXI Express modules.</p>

2021 ◽  
Author(s):  
◽  
Mathew David Bourne

<p>Magritek, a company who specialise in NMR and MRI devices, required a new backplane communication solution for transmission of data. Possible options were evaluated and it was decided to move to the PXI Express instrumentation standard. As a first step of moving to this system, an FPGA based PXI Express Peripheral Module was designed and constructed. In order to produce this device, details on PXI Express boards and the signals required were researched, and schematics produced. These were then passed onto the board designer who incorporated the design with other design work at Magritek to produce a PXI Express Peripheral Module for use as an NMR transceiver board. With the board designed, the FPGA was configured to provide PXI Express functionality. This was designed to allow PCI Express transfers at high data speeds using Direct Memory Access (DMA). The PXI Express Peripheral board was then tested and found to function correctly, providing Memory Write speeds of 228 MB/s and Memory Read speeds of 162 MB/s. Also, to provide a test system for this physical and FPGA design, backplanes were designed to test communication between PXI Express modules.</p>


2014 ◽  
Vol 556-562 ◽  
pp. 4303-4308
Author(s):  
Hua Long Zhao

As the demand of higher image quality and greater processing capabilities are growing, obtaining higher data bandwidth for on-chip processing is becoming a more and more important issue. DMA (Direct Memory Access) component, as the key element in stream processing SoC (System on Chip) [1], should be deeply researched and designed to satisfy the high data bandwidth requirement of processing units. In this paper, we introduce a scalable high-performance DMA architecture for complex SoC to satisfy rigorous high sustained bandwidth and versatile functionality requirements. Several techniques and structures are proposed in this paper. A state-in-art verification environment is built for our design to fully verify its functionality. At the end of the paper, the tape-out results are provided. The whole implementation has been silicon proven to be functional and efficient.


Author(s):  
М.В. Гога

The approach of the control the color informational display using modern technologies to simplify the implementation of the data transfer protocol and minimize the use of hardware costs in the conditions of instantaneous and extra-large data transfer in continuous mode was considered in the paper. The software and hardware implementation of the control based on STM32F103C8T6 microcontroller using ARM Cortex-M3 technology, WS2812B color LED ribbon and direct memory access technology was proposed.


2001 ◽  
Vol 674 ◽  
Author(s):  
Ralf Detemple ◽  
Inés Friedrich ◽  
Walter Njoroge ◽  
Ingo Thomas ◽  
Volker Weidenhof ◽  
...  

ABSTRACTVital requirements for the future success of phase change media are high data transfer rates, i.e. fast processes to read, write and erase bits of information. The understanding and optimization of fast transformations is a considerable challenge since the processes only occur on a submicrometer length scale in actual bits. Hence both high temporal and spatial resolution is needed to unravel the essential details of the phase transformation. We employ a combination of fast optical measurements with microscopic analyses using atomic force microscopy (AFM) and transmission electron microscopy (TEM). The AFM measurements exploit the fact that the phase transformation from amorphous to crystalline is accompanied by a 6% volume reduction. This enables a measurement of the vertical and lateral speed of the phase transformation. Several examples will be presented showing the information gained by this combination of techniques.


2002 ◽  
Vol 41 (Part 1, No. 3B) ◽  
pp. 1804-1807 ◽  
Author(s):  
Gakuji Hashimoto ◽  
Hiroki Shima ◽  
Kenji Yamamoto ◽  
Tsutomu Maruyama ◽  
Takashi Nakao ◽  
...  

2012 ◽  
Vol 229-231 ◽  
pp. 1543-1546
Author(s):  
Xiao Bo Zhou ◽  
Min Xia ◽  
Hai Long Cheng

To improve data transmission performance of the data acquisition card, a design of high-speed data transmission system is proposed in the thesis. Using FPGA of programmable logic devices, adopting Verilog HDL of hardware description language, the design of modularization and DMA transmission method is implemented in FPGA. Eventually the design implements the data transmission with high-speed through PCI Express interface. Through simulation and verification based on hardware system, this design is proved to be feasible and can satisfy the performance requirements of data transmission in the high-speed data acquisition card applied in high-speed railway communication. The design also has some value of application and reference for a universal data acquisition card.


2021 ◽  
pp. 60-70
Author(s):  
Piyush Kumar Shukla ◽  
◽  
Prashant Kumar Shukla ◽  

The interpretation of large data streams necessitates high-performance repeated transfers, which overload Microprocessor System on Chips (SoC). The effective direct memory access (DMA) controller performs bulk data transfers without the CPU's involvement. The Direct Memory Controller (DMAC) solves this by facilitating bulk data transfer and execution. In this work, we created an intelligent DMAC (I-DMAC) for accessing video processing data without using CPUs. The model includes Bus selection Module, User control signal, Status Register, DMA supported Address, and AXI-PCI subsystems for improved video frame analysis. These modules are experimentally verified in Xilinx FPGA SoC architecture using VHDL code simulation and results compared to the E-DMAC model.


2014 ◽  
Author(s):  
H. Shah ◽  
F. Marti ◽  
W. Noureddine ◽  
A. Eiriksson ◽  
R. Sharp

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