New Techniques for Logic Fault Diagnosis with a Case Study on the 440BX Chipset

1999 ◽  
Author(s):  
Srikanth Venkataraman ◽  
Scott B. Drummonds
Keyword(s):  
Fault Diagnosis ◽  
Failure Analysis ◽  
Fault Isolation ◽  
Automated Diagnosis ◽  
New Techniques ◽  
Design And Manufacturing ◽  
Cause Of Failure

Abstract Logic fault diagnosis or fault isolation is the process of analyzing failing random logic portions of a chip to isolate the cause of failure. Fault diagnosis or fault isolation (FI) plays an important role in multiple applications at different stages of design and manufacturing. Most currently deployed FI techniques for random logic fault isolation include physical techniques with limited automated diagnosis followed by e-beam and/or laser voltage probing (LVP) on packaged parts. This paper will present the methodology and FI results obtained by executing automated scan based diagnosis on a chipset product (440BX). The logic diagnosis techniques used are presented along with simulation and Failure Analysis (FA) results

Case Study in Fault Isolation of a Metal Short for Yield Enhancement

2010 ◽  
Author(s):  
Sarven Ipek ◽  
David Grosjean
Keyword(s):  
Failure Analysis ◽  
Failure Mechanism ◽  
Photon Emission ◽  
Fault Isolation ◽  
Yield Enhancement ◽  
Analysis Technique ◽  
Laser Signal ◽  
Signal Injection ◽  
Microscopy Techniques

Abstract The application of an individual failure analysis technique rarely provides the failure mechanism. More typically, the results of numerous techniques need to be combined and considered to locate and verify the correct failure mechanism. This paper describes a particular case in which different microscopy techniques (photon emission, laser signal injection, and current imaging) gave clues to the problem, which then needed to be combined with manual probing and a thorough understanding of the circuit to locate the defect. By combining probing of that circuit block with the mapping and emission results, the authors were able to understand the photon emission spots and the laser signal injection microscopy (LSIM) signatures to be effects of the defect. It also helped them narrow down the search for the defect so that LSIM on a small part of the circuit could lead to the actual defect.

Die-Level Scanning Capacitance Microscopy Fault Isolation on SOI Fin-FET Devices for Advanced Semiconductor Nodes

2018 ◽  
Author(s):  
Lucile C. Teague Sheridan ◽  
Tanya Schaeffer ◽  
Yuting Wei ◽  
Satish Kodali ◽  
Chong Khiam Oh
Keyword(s):  
Atomic Force Microscopy ◽  
Failure Analysis ◽  
Fault Isolation ◽  
Scanning Capacitance Microscopy ◽  
Force Microscopy ◽  
Atomic Force

Abstract It is widely acknowledged that Atomic force microscopy (AFM) methods such as conductive probe AFM (CAFM) and Scanning Capacitance Microscopy (SCM) are valuable tools for semiconductor failure analysis. One of the main advantages of these techniques is the ability to provide localized, die-level fault isolation over an area of several microns much faster than conventional nanoprobing methods. SCM, has advantages over CAFM in that it is not limited to bulk technologies and can be utilized for fault isolation on SOI-based technologies. Herein, we present a case-study of SCM die-level fault isolation on SOI-based FinFET technology at the 14nm node.

Case Study—Failure Analysis of a Multiplexer

2016 ◽  
Author(s):  
Michael Woo ◽  
Marcos Campos ◽  
Luigi Aranda
Keyword(s):  
Failure Analysis ◽  
High Reliability ◽  
Component Failure ◽  
Root Cause ◽  
Knowing That ◽  
Cause Of Failure ◽  
The Cost

Abstract A component failure has the potential to significantly impact the cost, manufacturing schedule, and/or the perceived reliability of a system, especially if the root cause of the failure is not known. A failure analysis is often key to mitigating the effects of a componentlevel failure to a customer or a system; minimizing schedule slips, minimizing related accrued costs to the customer, and allowing for the completion of the system with confidence that the reliability of the product had not been compromised. This case study will show how a detailed and systemic failure analysis was able to determine the exact cause of failure of a multiplexer in a high-reliability system, which allowed the manufacturer to confidently proceed with production knowing that the failure was not a systemic issue, but rather that it was a random “one time” event.

Short Wavelength Probing for Fault Isolation Applications

2020 ◽  
Author(s):  
Ravikumar Venkat Krishnan ◽  
Lua Winson ◽  
Vasanth Somasundaram ◽  
Phoa Angeline ◽  
Pey Kin Leong ◽  
...  
Keyword(s):  
Failure Analysis ◽  
Spatial Resolution ◽  
Short Wavelength ◽  
Fault Isolation ◽  
Laser Probing ◽  
Successful Case ◽  
20 Nm

Abstract Short wavelength probing (SWP) uses wavelengths of light shorter than 1100 nm or energies higher than silicon bandgap for laser probing applications. While SWP allows a significant improvement to spatial resolution, there are aberrations to the collected laser probing waveforms which result in difficulties in signal interpretations. In this work, we assess the signals collected through SWP (785 nm) and introduce a photodiode model to explain the observations. We also present a successful case study using 785 nm for failure analysis in sub-20 nm FinFET technology.

Case Study Failure Analysis of an Ultra-High Vacuum Enclosure Made of a Silicon Chip and Borosilicate Glass for the Cold Atom Laboratory

2017 ◽  
Author(s):  
Gil Garteiz ◽  
Javeck Verdugo ◽  
David Aveline ◽  
Eric Williams ◽  
Arvid Croonquist ◽  
...  
Keyword(s):  
Sample Preparation ◽  
Failure Analysis ◽  
Failure Mechanism ◽  
Borosilicate Glass ◽  
High Vacuum ◽  
Cold Atom ◽  
Fault Isolation ◽  
Ultra High Vacuum ◽  
Liquid Bath

Abstract In this paper, a failure analysis case study on a custom-built vacuum enclosure is presented. The enclosure’s unique construction and project requirement to preserve the maximum number of units for potential future use in space necessitated a fluorocarbon liquid bath for fault isolation and meticulous sample preparation to preserve the failure mechanism during failure analysis.

An Advanced Diagnosis Flow for SRAMs

2017 ◽  
Author(s):  
Tien-Phu Ho ◽  
Eric Faehn ◽  
Arnaud Virazel ◽  
Alberto Bosio ◽  
Patrick Girard
Keyword(s):  
Failure Analysis ◽  
Manufacturing Process ◽  
Single Chip ◽  
Automated Diagnosis ◽  
Representative Case ◽  
Preliminary Results ◽  
Accurate Localization ◽  
Analysis Phase ◽  
Yield Learning

Abstract In modern electronic designs, more and more memories are embedded in a single chip. With the latest technologies, defects due to the manufacturing process are more prone to occur in the periphery of the memory. Obtaining a fast and accurate localization of such defects has become much more difficult with traditional diagnosis approaches that do not allow a fast-enough yield learning and improvement. This paper describes a new and automated diagnosis flow for SRAMs to determine the localization of any given defect and thus, to precisely guide the Failure Analysis phase. Based on the electrical and topological fault signatures obtained through traditional methods, each potential fault on the identified active nets is automatically simulated to retrieve the best defect candidates. This paper also presents preliminary results on a representative case study.

Cavity Up and Stack Die Backside Failure Analysis for Thin Die and High Pin Count Devices

2004 ◽  
Author(s):  
Dat Nguyen ◽  
Thao To ◽  
Ray Harrison ◽  
Cuong Phan ◽  
John Drummond
Keyword(s):  
Sample Preparation ◽  
Failure Analysis ◽  
Fault Isolation ◽  
Front Side ◽  
Defect Identification ◽  
Automated Test Equipment ◽  
Special Analysis ◽  
Failure Correlation ◽  
Similar Sample

Abstract Owing to the configuration of cavity up and stacked die packaging and the requirements of backside analysis, both packaging types require similar sample preparation steps. This article describes the failure analysis (FA) process to be applied with cavity up and stack die packages. The FA process flow includes testing to determine the nature of the failure, failure correlation to chip and/or internal circuitry, die preparation for repackaging, die repackaging in a cavity down configuration, automated test equipment (ATE) testing to verify the integrity of the pre-packaging failure mode, backside thinning, global fault isolation, backside reconstruction, and defect identification by front side deprocessing. ATE FA can often be performed using special analysis modes and the modification of the test software to put tester in a halt or a loop during fault isolation. When this is completed, global FA techniques can be used. The article also presents a case study on the successful repackaging efforts of cavity up packages.

Improving Fault Isolation Using Iterative Diagnosis

2008 ◽  
Author(s):  
Kevin Gearhardt ◽  
Chris Schuermyer ◽  
Ruifeng Guo
Keyword(s):  
Fault Diagnosis ◽  
Failure Analysis ◽  
Test Generation ◽  
Pattern Generation ◽  
Fault Isolation ◽  
Isolation Techniques ◽  
Defect Localization

Abstract This paper presents an iterative diagnosis test generation framework to improve logic fault diagnosis resolution. Industrial examples are presented in this paper on how additional targeted pattern generation can be used to improve defect localization before physical failure analysis of a die. This enables failure analysts to be more effective by reducing the dependence on the more expensive physical fault isolation techniques.

Computed Tomography as Failure Analysis Insurance

2013 ◽  
Author(s):  
Gerald M. Martinez
Keyword(s):  
Computed Tomography ◽  
Failure Analysis ◽  
Electronic Components ◽  
Nondestructive Techniques ◽  
Cause Of Failure ◽  
The Way

Abstract Failure analysis of electronic components is almost always destructive, and there’s no going back once a destructive step is performed. Or, that’s the way it used to be, before the development of some of the more sophisticated nondestructive techniques such as computed tomography (CT). This paper presents a case study of an optocoupler, the suspected failure of which could not be confirmed until the last day of the month-long analysis, when the cause of failure was conclusively determined by a CT model captured weeks earlier.

scholarly journals A Comprehensive Case Study of Data-Driven Methods for Robust Aircraft Sensor Fault Isolation

Sensors ◽  
2021 ◽  
Vol 21 (5) ◽  
pp. 1645
Author(s):  
Nicholas Cartocci ◽  
Marcello R. Napolitano ◽  
Gabriele Costante ◽  
Mario L. Fravolini
Keyword(s):  
Fault Diagnosis ◽  
Fault Isolation ◽  
Data Driven ◽  
Fault Estimation ◽  
Linear Regression Models ◽  
Sensor Fault ◽  
Fault Reconstruction ◽  
Air Speed ◽  
Using Data

Recent catastrophic events in aviation have shown that current fault diagnosis schemes may not be enough to ensure a reliable and prompt sensor fault diagnosis. This paper describes a comparative analysis of consolidated data-driven sensor Fault Isolation (FI) and Fault Estimation (FE) techniques using flight data. Linear regression models, identified from data, are derived to build primary and transformed residuals. These residuals are then implemented to develop fault isolation schemes for 14 sensors of a semi-autonomous aircraft. Specifically, directional Mahalanobis distance-based and fault reconstruction-based techniques are compared in terms of their FI and FE performance. Then, a bank of Bayesian filters is proposed to compute, in flight, the fault belief for each sensor. Both the training and the validation of the schemes are performed using data from multiple flights. Artificial faults are injected into the fault-free sensor measurements to reproduce the occurrence of failures. A detailed evaluation of the techniques in terms of FI and FE performance is presented for failures on the air-data sensors, with special emphasis on the True Air Speed (TAS), Angle of Attack (AoA), and Angle of Sideslip (AoS) sensors.

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