Fail Mechanisms Causing Single Bit Flash Data Gain in Flash Memory

2009 ◽  
Author(s):  
Rajesh Medikonduri
Keyword(s):  
Flash Memory ◽  
Semiconductor Industry ◽  
Failure Mechanisms ◽  
Final Conclusion ◽  
Cell Theory ◽  
Data Loss ◽  
Voltage Contrast

Abstract Flash memory is one of the most mysterious and difficult structures in the semiconductor industry. Excessive data gain and data loss may cause errors in reading the flash memory. This paper discusses the data gain mechanism and the various failure mechanisms (i.e., CoSi at Mux, CoSi at bit, particle at Mux, resistive contact, erasing defect at failing bit, programming fail at bit, misaligned contact, passive voltage contrast (PVC) at multiple gates in Mux region, particle and missing via, poly residue defect etc.) causing single bit flash data gain. Presented in the paper are the definitions involved, Flash cell theory and physics involved, and the theory explaining why leakage in the 8:1 mux causes the single bit flash data gain. This is followed by a case study involving various failure mechanisms and a final conclusion. Knowing the fail mechanisms and correcting them promptly enhances the yield.

Effectiveness of Nanoprober in Detecting Single/Multiple Bit Flash Data Gain & Data Loss Failures

2009 ◽  
Author(s):  
Rajesh Medikonduri
Keyword(s):  
Flash Memory ◽  
Data Loss ◽  
Voltage Contrast

Abstract This paper discusses the physics, definitions, and nanoprobing flow of a flash bit memory. In addition, a case study showing the effectiveness of nanoprobing in detecting the Single Bit Fail Data Gain and Data Loss in Flash Memory is also discussed. The paper also includes cases where no passive voltage contrast was observed at the SEM and no leakage was observed at AFM, yet the units failing SBF DG, SBF DL and depletion, were detected by nanoprobing of the single bit. The major finding of this paper is a way to resolve data gain, data loss, and depletion failures of flash memory by nanoprobing procedure, despite no PVC seen at the SEM and no leakage seen at the AFM.

Production Yield Enhancement through Failure Analysis Investigation

2009 ◽  
Author(s):  
Rajesh Medikonduri
Keyword(s):  
Failure Analysis ◽  
Flash Memory ◽  
Production Yield ◽  
Yield Enhancement ◽  
Related Issue ◽  
Data Loss ◽  
Current Testing ◽  
Corrective Actions ◽  
The One

Abstract Production yield verification for a complex device, such as the flash memory, is a problem of primary importance due to high design density and current testing capabilities of such design. In this paper, the flow byte issue in the one time programmable block is investigated through physical failure analysis (PFA). The customer reported fail for this unit was flow byte error with flipped data loss in one of the bit. Various experiments were done on numerous units to identify the yield related issue and prevent shipment of such units to customers. The case study from this paper is beneficial to the FA community by showing the exact methodology in identifying the problem, its containment, and implementation of corrective actions on the ATE to prevent shipment of low yield units to customer. The yield was enhanced by implementing the containment and corrective actions on the ATE.

Failure Analysis Case Study in 0.18μm Flash Memory Devices and Root Cause Identification

2003 ◽  
Author(s):  
Wen-Rong Chen ◽  
Mao-Sheng Wu ◽  
Chi-Ling Chu
Keyword(s):  
Flash Memory ◽  
Defect Density ◽  
Failure Mechanisms ◽  
Storage Test ◽  
Root Cause ◽  
High Temperature Storage ◽  
Program Function ◽  
Root Cause Identification ◽  
Temperature Storage

Abstract This report summarizes the analysis of 0.18µm Flash ROM technology qualification failure cases at Macronix. The cases include single cell read failures, erase/program function failures, and high temperature storage test failures. Electrical analysis, EMMI and physical check by chemical de-processing, parallel lapping, FIB, SEM, PVC and TEM techniques were employed to identify the failure mechanisms, root causes, and solutions. From this study, improvements were achieved in process defect density, test fault coverage and product reliability of the 0.18µm Flash ROM technology.

Application of KOH Electrochemical Etch and Passive Voltage Contrast Techniques for Deep Sub-Micron CMOS Leaky Gate Detection

2000 ◽  
Author(s):  
Fred Y. Chang ◽  
Victer Chan
Keyword(s):  
Case Studies ◽  
Detection Technique ◽  
Cobalt Silicide ◽  
Process Technology ◽  
Process Flow ◽  
Voltage Contrast ◽  
Emission Detection ◽  
Wet Etch ◽  
Direct Confirmation

Abstract This paper describes a novel de-process flow by combining cobalt silicide / nitride wet etch with KOH electrochemical wet etch (ECW) to identify leaky gate in silicided deep sub-micron process technology. Traditionally, leaky gate identification requires direct confirmation by gate level electrical or emission detection technique. Ohtani [1] used KOH electrochemical etch application to identify nonsilicided leaky gate capacitor in DRAM without using the above confirmation. The result of the case study demonstrates the expanded application of ECW etch to both silicided 0.18um logic and SRAM devices. Voltage contrast at metal 1 to assist leaky gate localization is also proposed. By combining both techniques, the possibility for isolating gate related defects are greatly enhanced. Case studies also show the advantages of the proposed technique over conventional poly level voltage contrast in leaky gate identification especially with devices that use local interconnect and nitride liner process.

Advanced IR-OBIRCH Analysis Technique for High Isb Failure Analysis

2010 ◽  
Author(s):  
Kuo Hsiung Chen ◽  
Wen Sheng Wu ◽  
Yu Hsiang Shu ◽  
Jian Chan Lin
Keyword(s):  
Failure Analysis ◽  
Failure Mechanisms ◽  
Fault Localization ◽  
Resistance Change ◽  
The Real ◽  
Analysis Techniques ◽  
Analysis Technique ◽  
Leakage Failure ◽  
Failure Site

Abstract IR-OBIRCH (Infrared Ray – Optical Beam Induced Resistance Change) is one of the main failure analysis techniques [1] [2] [3] [4]. It is a useful tool to do fault localization on leakage failure cases such as poor Via or contact connection, FEoL or BEoL pattern bridge, and etc. But the real failure sites associated with the above failure mechanisms are not always found at the OBIRCH spot locations. Sometimes the real failure site is far away from the OBIRCH spot and it will result in inconclusive PFA Analysis. Finding the real failure site is what matters the most for fault localization detection. In this paper, we will introduce one case using deep sub-micron process generation which suffers serious high Isb current at wafer donut region. In this case study a BEoL Via poor connection is found far away from the OBIRCH spots. This implies that layout tracing skill and relation investigation among OBIRCH spots are needed for successful failure analysis.

Methodology for Analysis of Schottky Diode Failures

2010 ◽  
Author(s):  
Bhanu P. Sood ◽  
Michael Pecht ◽  
John Miker ◽  
Tom Wanek
Keyword(s):  
Failure Mode ◽  
Schottky Diode ◽  
Failure Modes ◽  
Schottky Diodes ◽  
Failure Mechanisms ◽  
Forward Voltage ◽  
Fast Switching ◽  
Voltage Drops ◽  
The Common

Abstract Schottky diodes are semiconductor switching devices with low forward voltage drops and very fast switching speeds. This paper provides an overview of the common failure modes in Schottky diodes and corresponding failure mechanisms associated with each failure mode. Results of material level evaluation on diodes and packages as well as manufacturing and assembly processes are analyzed to identify a set of possible failure sites with associated failure modes, mechanisms, and causes. A case study is then presented to illustrate the application of a systematic FMMEA methodology to the analysis of a specific failure in a Schottky diode package.

Implementation of Decision Tree for Maintenance Policy Decision Making - A Case Study in Semiconductor Industry

2012 ◽  
Vol 591-593 ◽  
pp. 704-707 ◽  
Author(s):  
Siew Hong Ding ◽  
Teing Tien Goh ◽  
Pei Sze Tan ◽  
Siew Ching Wee ◽  
Shahrul Kamaruddin
Keyword(s):  
Decision Making ◽  
Decision Tree ◽  
Failure Mechanism ◽  
Semiconductor Industry ◽  
Policy Decision ◽  
Decision Making Process ◽  
Maintenance Policy ◽  
Machine Performance ◽  
Policy Decision Making

Suitable maintenance policy implemented in particular machine able to improve the machine performance as well as the product quality. However, selecting a suitable maintenance policy is a vital and hard work because it has to be decided from analysis of various criteria including failure mechanism and resources limitation. Thus, decision tree is suggested in this paper to provide assistance for maintenance crew in conducting a systematic and efficient decision making process in determining the suitable maintenance policy. In the end of the paper, a case study in semiconductor industry is conducted to illustrate the practicability of developed decision tree.

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