scholarly journals Software Requirement Specification Based on a Gray Box for Embedded Systems: A Case Study of a Mobile Phone Camera Sensor Controller

Computers ◽  
2019 ◽  
Vol 8 (1) ◽  
pp. 20
Author(s):  
Soojin Park
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Mobile Phone ◽  
Black Box ◽  
Requirement Analysis ◽  
Use Case ◽  
Requirement Specification ◽  
Analysis Phase ◽  
Use Case Model ◽  
Camera Sensor

One of the most widely used models for specifying functional requirements is a use case model. The viewpoint of the use case model that views a system as a black box focuses on descriptions of external interactions between the system and related environments. However, for embedded systems that do not disclose most implementation logics outside the system, black box-based use case models may experience the drawback that considerable information that must be defined for system developments is omitted. To solve this shortcoming, several studies have been proposed on the use of kind of white box technique in which the dynamic behaviors of embedded systems are defined first using a state diagram and the results are reflected in the requirement specifications. However, white box-based modeling has not been widely adopted by developers due to tasks that require a lot of time in the requirement analysis phase in the initial phase of the software development life cycle. This study proposes a gray box-based requirement specification method as a trade-off between two contradictory elements (the amount of information required to develop an embedded system and the cost of the effort required during the requirement analysis phase) in terms of the two approaches, the black and the white box-based models. The proposed method suggests that an appropriate depth level of embedded system modeling is required to define the requirements. This study also proposes a mechanism that automatically generates an application programming interface for each component based on the created model. The proposed method was applied to the development of a camera sensor controller in a mobile phone, and the case results proved the feasibility of the method through discussion of the application results.

scholarly journals Requirement analysis for autograder system using use case model

2021 ◽  
Vol 1098 (3) ◽  
pp. 032084
Author(s):  
R Elsen ◽  
D Kurniadi ◽  
S Rahayu ◽  
M R Nashrulloh
Keyword(s):  
Requirement Analysis ◽  
Use Case ◽  
Use Case Model

DEVELOPMENTAL SIZE ESTIMATION FOR OBJECT-ORIENTED SOFTWARE BASED ON ANALYSIS MODEL

2013 ◽  
Vol 23 (03) ◽  
pp. 289-308 ◽  
Author(s):  
CHAMUNDESWARI ARUMUGAM ◽  
CHITRA BABU
Keyword(s):  
Software Development ◽  
Object Oriented ◽  
Use Case ◽  
Size Estimation ◽  
Model Function ◽  
Analysis Phase ◽  
Point Analysis ◽  
Function Point ◽  
Model Components ◽  
Use Case Model

Software size estimation at the early analysis phase of software development lifecycle is crucial for predicting the associated effort and cost. Analysis phase captures the functionality addressed in the software to be developed in object-oriented software development life-cycle. Unified modeling language captures the functionality of the software at the analysis phase based on use case model. This paper proposes a new method named as use case model function point to estimate the size of the object-oriented software at the analysis phase itself. While this approach is based on use case model, it also adapts the function point analysis technique to use case model. The various features such as actors, use cases, relationship, external reference, flows, and messages are extracted from use case model. Eleven rules have been derived as guidelines to identify the use case model components. The function point analysis components are appropriately mapped to use case model components and the complexity based on the weightage is specified to calculate use case model function point. This proposed size estimation approach has been evaluated with the object-oriented software developed in our software engineering laboratory to assess its ability to predict the developmental size. The results are empirically analysed based on statistical correlation for substantiating the proposed estimation method.

Compiler-Aided Run-Time Performance Speed-Up in Super-Scalar Processor

10.28945/3391 ◽  
2009 ◽  
Author(s):  
Moshe Pelleh
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
General Purpose ◽  
Experimental Results ◽  
Medium Size ◽  
Organic System ◽  
Software Application ◽  
Organic Systems ◽  
Special Cases ◽  
Run Time

In our world, where most systems become embedded systems, the approach of designing embedded systems is still frequently similar to the approach of designing organic systems (or not embedded systems). An organic system, like a personal computer or a work station, must be able to run any task submitted to it at any time (with certain constrains depending on the machine). Consequently, it must have a sophisticated general purpose Operating System (OS) to schedule, dispatch, maintain and monitor the tasks and assist them in special cases (particularly communication and synchronization between them and with external devices). These OSs require an overhead on the memory, on the cache and on the run time. Moreover, generally they are task oriented rather than machine oriented; therefore the processor's throughput is penalized. On the other hand, an embedded system, like an Anti-lock Braking System (ABS), executes always the same software application. Frequently it is a small or medium size system, or made up of several such systems. Many small or medium size embedded systems, with limited number of tasks, can be scheduled by our proposed hardware architecture, based on the Motorola 500MHz MPC7410 processor, enhancing its throughput and avoiding the software OS overhead, complexity, maintenance and price. Encouraged by our experimental results, we shall develop a compiler to assist our method. In the meantime we will present here our proposal and the experimental results.

Ringtone

2017 ◽  
Author(s):  
Yves Doz ◽  
Keeley Wilson
Keyword(s):  
Mobile Phone ◽  
Mobile Communications ◽  
Research Agenda ◽  
Black Box ◽  
Senior Managers ◽  
The World ◽  
Things Fall Apart ◽  
The Doors

In less than three decades, Nokia emerged from Finland to lead the mobile phone revolution. It grew to have one of the most recognizable and valuable brands in the world and then fell into decline, leading to the sale of its mobile phone business to Microsoft. This book explores and analyzes that journey and distills observations and lessons for anyone keen to understand what drove Nokia’s amazing success and sudden downfall. It is tempting to lay the blame for Nokia’s demise at the doors of Apple, Google, and Samsung, but this would be to ignore one very important fact: Nokia had begun to collapse from within well before any of these companies entered the mobile communications market, and this makes Nokia’s story all the more interesting. Observing from the position of privileged outsiders (with access to Nokia’s senior managers over the last twenty years and a more recent, concerted research agenda), this book describes and analyzes the various stages in Nokia’s journey. This is an inside story: one of leaders making strategic and organizational decisions, of their behavior and interactions, and of how they succeeded and failed to inspire and engage their employees. Perhaps most intriguingly, it is a story that opens the proverbial “black box” of why and how things actually happen at the top of organizations. Why did things fall apart? To what extent were avoidable mistakes made? Did the world around Nokia change too fast for it to adapt? Did Nokia’s success contain the seeds of its failure?

scholarly journals A Novel Rail-Network Hardware Simulator for Embedded System Programming

Electronics ◽  
2020 ◽  
Vol 10 (1) ◽  
pp. 13
Author(s):  
Balaji M ◽  
Chandrasekaran M ◽  
Vaithiyanathan Dhandapani
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Real Time ◽  
Learning Outcomes ◽  
Real World ◽  
Time Constraints ◽  
Network Simulator ◽  
Practical Applications ◽  
Rail Network ◽  
Knowledge Enhancement

A Novel Rail-Network Hardware with simulation facilities is presented in this paper. The hardware is designed to facilitate the learning of application-oriented, logical, real-time programming in an embedded system environment. The platform enables the creation of multiple unique programming scenarios with variability in complexity without any hardware changes. Prior experimental hardware comes with static programming facilities that focus the students’ learning on hardware features and programming basics, leaving them ill-equipped to take up practical applications with more real-time constraints. This hardware complements and completes their learning to help them program real-world embedded systems. The hardware uses LEDs to simulate the movement of trains in a network. The network has train stations, intersections and parking slots where the train movements can be controlled by using a 16-bit Renesas RL78/G13 microcontroller. Additionally, simulating facilities are provided to enable the students to navigate the trains by manual controls using switches and indicators. This helps them get an easy understanding of train navigation functions before taking up programming. The students start with simple tasks and gradually progress to more complicated ones with real-time constraints, on their own. During training, students’ learning outcomes are evaluated by obtaining their feedback and conducting a test at the end to measure their knowledge acquisition during the training. Students’ Knowledge Enhancement Index is originated to measure the knowledge acquired by the students. It is observed that 87% of students have successfully enhanced their knowledge undergoing training with this rail-network simulator.

scholarly journals A Generalization Performance Study Using Deep Learning Networks in Embedded Systems

Sensors ◽  
2021 ◽  
Vol 21 (4) ◽  
pp. 1031
Author(s):  
Joseba Gorospe ◽  
Rubén Mulero ◽  
Olatz Arbelaitz ◽  
Javier Muguerza ◽  
Miguel Ángel Antón
Keyword(s):  
Deep Learning ◽  
Embedded Systems ◽  
Embedded System ◽  
General Purpose ◽  
Learning Networks ◽  
Performance Study ◽  
Learning Techniques ◽  
Wide Range ◽  
Learning Architectures

Deep learning techniques are being increasingly used in the scientific community as a consequence of the high computational capacity of current systems and the increase in the amount of data available as a result of the digitalisation of society in general and the industrial world in particular. In addition, the immersion of the field of edge computing, which focuses on integrating artificial intelligence as close as possible to the client, makes it possible to implement systems that act in real time without the need to transfer all of the data to centralised servers. The combination of these two concepts can lead to systems with the capacity to make correct decisions and act based on them immediately and in situ. Despite this, the low capacity of embedded systems greatly hinders this integration, so the possibility of being able to integrate them into a wide range of micro-controllers can be a great advantage. This paper contributes with the generation of an environment based on Mbed OS and TensorFlow Lite to be embedded in any general purpose embedded system, allowing the introduction of deep learning architectures. The experiments herein prove that the proposed system is competitive if compared to other commercial systems.

scholarly journals Singular Value Decomposition in Embedded Systems Based on ARM Cortex-M Architecture

Electronics ◽  
2020 ◽  
Vol 10 (1) ◽  
pp. 34
Author(s):  
Michele Alessandrini ◽  
Giorgio Biagetti ◽  
Paolo Crippa ◽  
Laura Falaschetti ◽  
Lorenzo Manoni ◽  
...  
Keyword(s):  
Embedded Systems ◽  
Singular Value Decomposition ◽  
Embedded System ◽  
Mimo Systems ◽  
Singular Value ◽  
Measurement Unit ◽  
Comprehensive Treatment ◽  
Mathematical Tool ◽  
Value Decomposition ◽  
Speed Accuracy

Singular value decomposition (SVD) is a central mathematical tool for several emerging applications in embedded systems, such as multiple-input multiple-output (MIMO) systems, data analytics, sparse representation of signals. Since SVD algorithms reduce to solve an eigenvalue problem, that is computationally expensive, both specific hardware solutions and parallel implementations have been proposed to overcome this bottleneck. However, as those solutions require additional hardware resources that are not in general available in embedded systems, optimized algorithms are demanded in this context. The aim of this paper is to present an efficient implementation of the SVD algorithm on ARM Cortex-M. To this end, we proceed to (i) present a comprehensive treatment of the most common algorithms for SVD, providing a fairly complete and deep overview of these algorithms, with a common notation, (ii) implement them on an ARM Cortex-M4F microcontroller, in order to develop a library suitable for embedded systems without an operating system, (iii) find, through a comparative study of the proposed SVD algorithms, the best implementation suitable for a low-resource bare-metal embedded system, (iv) show a practical application to Kalman filtering of an inertial measurement unit (IMU), as an example of how SVD can improve the accuracy of existing algorithms and of its usefulness on a such low-resources system. All these contributions can be used as guidelines for embedded system designers. Regarding the second point, the chosen algorithms have been implemented on ARM Cortex-M4F microcontrollers with very limited hardware resources with respect to more advanced CPUs. Several experiments have been conducted to select which algorithms guarantee the best performance in terms of speed, accuracy and energy consumption.

scholarly journals MODES: model-based optimization on distributed embedded systems

2021 ◽  
Author(s):  
Junjie Shi ◽  
Jiang Bian ◽  
Jakob Richter ◽  
Kuan-Hsun Chen ◽  
Jörg Rahnenführer ◽  
...  
Keyword(s):  
Machine Learning ◽  
Embedded Systems ◽  
Learning Model ◽  
Black Box ◽  
Distributed Embedded Systems ◽  
Data Set ◽  
Individual Model ◽  
Model Based ◽  
Machine Learning Model ◽  
Distributed Machine Learning

AbstractThe predictive performance of a machine learning model highly depends on the corresponding hyper-parameter setting. Hence, hyper-parameter tuning is often indispensable. Normally such tuning requires the dedicated machine learning model to be trained and evaluated on centralized data to obtain a performance estimate. However, in a distributed machine learning scenario, it is not always possible to collect all the data from all nodes due to privacy concerns or storage limitations. Moreover, if data has to be transferred through low bandwidth connections it reduces the time available for tuning. Model-Based Optimization (MBO) is one state-of-the-art method for tuning hyper-parameters but the application on distributed machine learning models or federated learning lacks research. This work proposes a framework $$\textit{MODES}$$ MODES that allows to deploy MBO on resource-constrained distributed embedded systems. Each node trains an individual model based on its local data. The goal is to optimize the combined prediction accuracy. The presented framework offers two optimization modes: (1) $$\textit{MODES}$$ MODES -B considers the whole ensemble as a single black box and optimizes the hyper-parameters of each individual model jointly, and (2) $$\textit{MODES}$$ MODES -I considers all models as clones of the same black box which allows it to efficiently parallelize the optimization in a distributed setting. We evaluate $$\textit{MODES}$$ MODES by conducting experiments on the optimization for the hyper-parameters of a random forest and a multi-layer perceptron. The experimental results demonstrate that, with an improvement in terms of mean accuracy ($$\textit{MODES}$$ MODES -B), run-time efficiency ($$\textit{MODES}$$ MODES -I), and statistical stability for both modes, $$\textit{MODES}$$ MODES outperforms the baseline, i.e., carry out tuning with MBO on each node individually with its local sub-data set.

scholarly journals The Design of a 2D Graphics Accelerator for Embedded Systems

Electronics ◽  
2021 ◽  
Vol 10 (4) ◽  
pp. 469
Author(s):  
Hyun Woo Oh ◽  
Ji Kwang Kim ◽  
Gwan Beom Hwang ◽  
Seung Eun Lee
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Real Time ◽  
Line Drawing ◽  
Cmos Process ◽  
Embedded Processor ◽  
Processor Core ◽  
Field Programmable ◽  
The Embedded System ◽  
Graphics Processing

Recently, advances in technology have enabled embedded systems to be adopted for a variety of applications. Some of these applications require real-time 2D graphics processing running on limited design specifications such as low power consumption and a small area. In order to satisfy such conditions, including a specific 2D graphics accelerator in the embedded system is an effective method. This method reduces the workload of the processor in the embedded system by exploiting the accelerator. The accelerator assists the system to perform 2D graphics processing in real-time. Therefore, a variety of applications that require 2D graphics processing can be implemented with an embedded processor. In this paper, we present a 2D graphics accelerator for tiny embedded systems. The accelerator includes an optimized line-drawing operation based on Bresenham’s algorithm. The optimized operation enables the accelerator to deal with various kinds of 2D graphics processing and to perform the line-drawing instead of the system processor. Moreover, the accelerator also distributes the workload of the processor core by removing the need for the core to access the frame buffer memory. We measure the performance of the accelerator by implementing the processor, including the accelerator, on a field-programmable gate array (FPGA), and ascertaining the possibility of realization by synthesizing using the 180 nm CMOS process.

scholarly journals Testing embedded systems using test cases generated through combinatorial techniques

2018 ◽  
Vol 7 (2.7) ◽  
pp. 146
Author(s):  
Lakshmi Prasad Mudarakola ◽  
J K.R. Sastry ◽  
V Chandra Prakash
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Traffic Control ◽  
Nuclear Reactor ◽  
Test Cases ◽  
Critical Systems ◽  
Daily Lives ◽  
Intelligent Devices ◽  
Wireless Infrastructure ◽  
Combinatorial Methods

Thorough testing of embedded systems is required especially when the systems are related to monitoring and controlling the mission critical and safety critical systems. The embedded systems must be tested comprehensively which include testing hardware, software and both together. Embedded systems are highly intelligent devices that are infiltrating our daily lives such as the mobile in your pocket, and wireless infrastructure behind it, routers, home theatre system, the air traffic control station etc. Software now makes up 90% of the value of these devices. In this paper, authors present different methods to test an embedded system using test cases generated through combinatorial techniques. The experimental results for testing a TMCNRS (Temperature Monitoring and Controlling Nuclear Reactor System) using test cases generated from combinatorial methods are also shown.

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