scholarly journals FPGA Techniques Based New Hybrid Modulation Strategies for Voltage Source Inverters

2015 ◽  
Vol 2015 ◽  
pp. 1-6 ◽  
Author(s):  
L. U. Sudha ◽  
J. Baskaran ◽  
S. A. Elankurisil
Keyword(s):  
Pulse Width ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Performance Criterion ◽  
Voltage Source ◽  
Voltage Source Inverters ◽  
Hybrid Modulation ◽  
Switching Losses ◽  
Harmonic Pollution ◽  
Modulation Methods

This paper corroborates three different hybrid modulation strategies suitable for single-phase voltage source inverter. The proposed method is formulated using fundamental switching and carrier based pulse width modulation methods. The main tale of this proposed method is to optimize a specific performance criterion, such as minimization of the total harmonic distortion (THD), lower order harmonics, switching losses, and heat losses. The proposed method is articulated using fundamental switching and carrier based pulse width modulation methods. Thus, the harmonic pollution in the power system will be reduced and the power quality will be augmented with better harmonic profile for a target fundamental output voltage. The proposed modulation strategies are simulated in MATLAB r2010a and implemented in a Xilinx spartan 3E-500 FG 320 FPGA processor. The feasibility of these modulation strategies is authenticated through simulation and experimental results.

scholarly journals A Comprehensive AC Current Ripple Analysis and Performance Enhancement via Discontinuous PWM in Three-Phase Four-Leg Grid-Connected Inverters

Energies ◽  
2020 ◽  
Vol 13 (17) ◽  
pp. 4352 ◽  
Author(s):  
Riccardo Mandrioli ◽  
Aleksandr Viatkin ◽  
Manel Hammami ◽  
Mattia Ricco ◽  
Gabriele Grandi
Keyword(s):  
Pulse Width ◽  
Pulse Width Modulation ◽  
Performance Enhancement ◽  
Voltage Source ◽  
Complete Analysis ◽  
Switching Frequency ◽  
Output Current ◽  
Voltage Source Inverters ◽  
Switching Losses ◽  
Current Ripple

A complete analysis of the ac output current ripple in four-leg voltage source inverters considering multiple modulation schemes is provided. In detail, current ripple envelopes and peak-to-peak profiles have been determined in the whole fundamental period and a comprehensive method providing the current ripple rms has been achieved, all of them as a function of the modulation index. These characteristics have been determined for both phase and neutral currents, considering the most popular common-mode injection schemes. Particular attention has been paid to the performance of discontinuous pulse width modulation (DPWM) methods, including DPWMMAX and DPWMMIN, and their four most popular combinations DPWM0, DPWM1, DPWM2, and DPWM3. Furthermore, a comparison with a few continuous techniques (sinusoidal, centered pulse width modulations, and third harmonic injection) has been provided as well. Moreover, the average switching frequency and switching losses are analyzed, determining which PWM technique ensures minimum output current ripple within the linear modulation range at different assumptions. Numerical simulations and laboratory tests have been conducted to extensively verify all the analytical claims for all the considered PWM injections.

scholarly journals A study on performances of carrier-based pulse-width modulation techniques for three-phase three-level t-type neutral-point-clamped inverter under switch-open-circuit fault on two neutral-point-connected legs

2020 ◽  
Vol 3 (3) ◽  
pp. first
Author(s):  
Nhờ Văn NGUYỄN ◽  
HONG-PHONG NGUYEN LE
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Short Circuit ◽  
Harmonic Distortion ◽  
Open Circuit ◽  
Neutral Point ◽  
Voltage Source ◽  
Voltage Source Inverters ◽  
Critical Issues

Multilevel voltage source inverters (VSIs) have been used for several decades thanks to their advantages compared with traditional two level VSI. Among various types of multilevel configuration, the T-type neutral-point-clamped VSI (3L TNPC VSI or 333-type VSI) has gained the attention in recent years. Due to the unique structure, the 333-type VSI has critical issues in reliability in operation such as switch-open-circuit (SOC) and switch-short-circuit (SSC), which lead to several unrequired issues, for instance, reduction of system performance, distorted and unbalanced output voltages and currents, or triggering the protection circuits. In some applications, the amplitude reduction and harmonics distortion of output voltages in SOC faults are not acceptable. Therefore, it is necessary to develop a pulse-width modulation (PWM) algorithm for 333-type VSI working under SOC fault which guarantees the desired output fundamental component voltage. The simultaneous SOC fault on two neutral-point-connected legs in the 333-type VSI may cause a large reduction in the output voltage. Under this circumstance, the 333-type VSI becomes an asymmetrical one called 322-type VSI. Certain studies regarding to the operation of 333-type VSI under SOC faults have been carried out. However, these studies require more semiconductor devices in order to create a redundant switching circuit. This leads to higher system cost with reduced inverter effieciency due to the additional loss. In this study, two carrier-based pulse-width modulation (CBPWM) techniques, i.e. 322-sinusoidal PWM (322-SPWM) and 322-medium offset CBPWM (322-MOCBPWM) are proposed for 322-type VSI. The proposed techniques are firstly simulated in MATLAB/Simulink and then implemented on a hardware setup. Performances of the proposed techniques are evaluated in terms of total harmonic distortion (THD) and weighted-THD (WTHD) of output voltages. Simulation results show that considering the worst output voltage under SOC fault, vBC, the proposed 322-SPWM technique could improve the THD by 40% and the WTHD by 94% compared with the uncompensated case with m=0.8. The corresponding results of 322-MOCBPWM technique are 42% and 96%, respectively. Characteristics of THD and WTHD values are also presented for demonstration the effectiveness of the proposed algorithm.

scholarly journals Inverted sine carrier for fundamental fortification in PWM inverters and FPGA based implementations

2007 ◽  
Vol 4 (2) ◽  
pp. 171-187 ◽  
Author(s):  
S. Jeevananthan ◽  
R. Nandhakumar ◽  
P. Dananjayan
Keyword(s):  
Pulse Width Modulation ◽  
Reference Signal ◽  
Harmonic Distortion ◽  
Detailed Comparison ◽  
Modulation Index ◽  
Voltage Source ◽  
Fundamental Component ◽  
Switching Losses ◽  
Harmonic Content ◽  
Field Programmable

This paper deals with a novel natural sampled pulse width modulation (PWM) switching strategy for voltage source inverter through carrier modification. The proposed inverted sine carrier PWM (ISCPWM) method, which uses the conventional sinusoidal reference signal and an inverted sine carrier, has a better spectral quality and a higher fundamental component compared to the conventional sinusoidal PWM (SPWM) without any pulse dropping. The ISCPWM strategy enhances the fundamental output voltage particularly at lower modulation index ranges while keeping the total harmonic distortion (THD) lower without involving changes in device switching losses. The presented mathematical preliminaries for both SPWM and ISCPWM give a conceptual understanding and a comparison of the strategies. The detailed comparison of the harmonic content and fundamental component of the ISCPWM output for different values of modulation index with the results obtained for the SPWM is also presented. Finally, the proposed modulator has been implemented in field programmable gate array (FPGA- Xilinx Spartan 3) and tested with the proto-type inverter.

Synchronized Symmetrical Bus-Clamping PWM Strategies for Three Level Inverter: Applications to Low Switching Frequencies

2011 ◽  
Vol 12 (2) ◽  
Author(s):  
Sreenivasappa Bhupasandra Veeranna ◽  
Udaykumar R Yaragatti ◽  
Abdul R Beig
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
High Performance ◽  
Pulse Width Modulation ◽  
Industrial Applications ◽  
Voltage Source ◽  
Switching Frequency ◽  
Space Vector ◽  
Digital Implementation ◽  
Switching Losses

The digital control of three-level voltage source inverter fed high power high performance ac drives has recently become a popular in industrial applications. In order to control such drives, the pulse width modulation algorithm needs to be implemented in the controller. In this paper, synchronized symmetrical bus-clamping pulse width modulation strategies are presented. These strategies have some practical advantages such as reduced average switching frequency, easy digital implementation, reduced switching losses and improved output voltage quality compared to conventional space vector pulse width modulation strategies. The operation of three level inverter in linear region is extended to overmodulation region. The performance is analyzed in terms THD and fundamental output voltage waveforms and is compared with conventional space vector PWM strategies and found that switching losses can be minimized using bus-clamping strategy compared to conventional space vector strategy. The proposed method is implemented using Motorola Power PC 8240 processor and verified on a constant v/f induction motor drive fed from IGBT based inverter.

scholarly journals Performance evaluation and comparison of diode clamped multilevel inverter and hybrid inverter based on PD and APOD modulation techniques

2019 ◽  
Vol 8 (2) ◽  
pp. 143
Author(s):  
N. Susheela ◽  
P. Satish Kumar
Keyword(s):  
Pulse Width ◽  
Single Phase ◽  
Pulse Width Modulation ◽  
Control Method ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Multilevel Inverters ◽  
Number Of Components ◽  
Modulation Techniques ◽  
Modulation Methods

<p>The popularity of multilevel inverters have increasing over the years in various applications without use of a transformer and has many benefits. This work presents the performance and comparative analysis of single phase diode clamped multilevel inverter and a hybrid inverter with reduced number of components. As there are some drawbacks of diode clamped multilevel inverter such as requiring higher number of components, PWM control method is complex and capacitor voltage balancing problem, an implementation of hybrid inverter that requires fewer components and less carrier signals when compared to conventional multilevel inverters is discussed. The performance of single phase diode clamped multilevel inverter and hybrid multilevel inverter for seven, nine and eleven levels is performed using phase disposition, alternate phase opposition disposition sinusoidal pulse width modulation techniques. Both the multilevel inverter are implemented for the above mentioned multicarrier based Pulse Width Modulation methods for R and R-L loads.  The total harmonic distortion is evaluated at various modulation indices. The analysis of the multilevel inverters is done by simulation in matlab / simulink environment.</p>

Carrier-Based PWM Technique for Inverter-Fed Multiphase Induction Motor 

2016 ◽  
Vol 6 (5) ◽  
pp. 1967
Author(s):  
Jyothi B ◽  
M.Venugopala Rao
Keyword(s):  
Induction Motor ◽  
Pulse Width ◽  
Pulse Width Modulation ◽  
Voltage Source ◽  
Matlab Software ◽  
Third Harmonic ◽  
Voltage Source Inverters ◽  
Three Phase ◽  
Simulation Results ◽  
Multiphase Machine

<p>Multiphase (more than three phases) is very much popular due to their eminent features compared to conventional three-phase counter parts. In order to drive the multiphase machine, it requires same phase input w.r.t the no of phases at the output. This paper mainly focuses on five phase, because even after failure of one phase, the performance does not degraded much. Voltage source inverters (VSIs) are used to feed the induction motor. voltage source inverters (VSIs) switches are ON and OFF precisely to control the output. In order to implement harmonic waveform characteristic, carrier based PWM (pulse width modulation) is performed. By using with and without third harmonic injection machine torque is highly improved. Using MATLAB software, the simulation results are presented in the form of computer traces and high traded performance of the machine are discussed.</p>

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