scholarly journals Multicore-Processor Based Software-Defined Communication/Network Platform for Underwater Internet of Things

Sensors ◽  
2019 ◽  
Vol 19 (23) ◽  
pp. 5168 ◽  
Author(s):  
Chaohui Luo ◽  
Biyun Ma ◽  
Fangjiong Chen ◽  
Quansheng Guan ◽  
Hua Yu ◽  
...  
Keyword(s):  
High Performance ◽  
Physical Layer ◽  
Network Simulator ◽  
Multicore Processor ◽  
Acoustic Channel ◽  
Important Research Topic ◽  
Network Platform ◽  
Reconfigurable Platform ◽  
Networking Protocols ◽  
Dual Core

Software-defined acoustic modems (SDAMs) for underwater communication and networking have been an important research topic due to their flexibility and programmability. In this paper, we propose a reconfigurable platform for SDAMs based on the TI AM5728 processor, which integrates dual-core ARM Cortex-A15 CPUs and two TI C66x DSP cores. The signal processing and A/D, D/A for physical-layer communication are implemented in the DSP cores. The networking protocols and the application programs are implemented in the ARM cores. The proposed platform has the following characteristics: (1) Due to the high-performance dual-ARM cores, the whole NS3 network simulator can be run in the ARM cores. Network protocols developed in a software simulation platform (e.g., NS3 platform) can be seamlessly migrated to a hardware platform without modification. (2) A new physical-layer module associated with real acoustic channel is developed, such that a data packet generated from the application layer will be transmitted through a real acoustic channel. The results of networking experiments with five nodes are presented to demonstrate the effectiveness of the proposed platform.

Photovoltaic Cell Test System Based on Dual-Core Processors

2011 ◽  
Vol 121-126 ◽  
pp. 4229-4233
Author(s):  
Ping Chuan Zhang ◽  
Yun Long Kong ◽  
Hang Sen Zhang
Keyword(s):  
High Performance ◽  
Fill Factor ◽  
Photovoltaic Cells ◽  
Photovoltaic Cell ◽  
Test System ◽  
Photoelectric Conversion Efficiency ◽  
Photoelectric Conversion ◽  
Data Processing Center ◽  
Cell Test ◽  
Dual Core

This paper design an intelligent photovoltaic cell test system. The high performance dual-core 16bits SPCE061A microprocessors are used as control and data processing center. The powerful data operation ability of SPCE061A makes it to carry out software filter for measured data and enhances testing precision. the experiments demonstrated the test system can measure the characteristic parameters of photovoltaic cells: open voltage, current, the fill factor and photoelectric conversion efficiency, draw photovoltaic cells I-V curve, find the best working points , and also have the characteristics of miniaturization and intelligent.

scholarly journals Reconfigurable platform for 3D-panoramic telepresence system for mobile applications

2021 ◽  
Author(s):  
Artur Saakov
Keyword(s):  
High Performance ◽  
Outer Space ◽  
Nuclear Industry ◽  
Human Beings ◽  
Reconfigurable Logic ◽  
Logic Devices ◽  
Hazardous Environments ◽  
High Bandwidth ◽  
Reconfigurable Platform ◽  
Bomb Disposal

The concept of telepresence allows human beings to interact with hazardous environments and situations without facing any actual risks. Examples include the nuclear industry, outer space and underwater operations, mining, bomb disposal and firefighting. Recent progress in digital system technology, especially in technology of reconfigurable logic devices (e.g. FPGA), allows the effective implementation of advanced embedded systems characterized by high-performance data processing and high-bandwidth communication. However, most of the existing telepresence systems do not benefit from these advancements. Therefore, the goal of this work was to develop a concept and architecture of the platform for the 3D-Panoramic Telepresence System for mobile robotic applications based on reconfigurable logic devices. During the development process, two versions of the system were implemented. The first system focused on feasibility testing of major components of the proposed architecture. Based on the experimental results obtained on the first prototype of the system and their analyses, a set of recommendations were derived for an updated version of the system. These recommendations were incorporated into the implementation of the second and final version of the system.

Designing of High Performance Multicore Processor with Improved Cache Configuration and Interconnect

2016 ◽  
pp. 204-219
Author(s):  
Ram Prasad Mohanty ◽  
Ashok Kumar Turuk ◽  
Bibhudatta Sahoo
Keyword(s):  
High Performance ◽  
Multicore Processors ◽  
Multicore Processor ◽  
Cache Size ◽  
L2 Cache ◽  
Internal Network ◽  
On Chip ◽  
L1 And L2 ◽  
The Impact ◽  
Cache Configuration

The growing number of cores increases the demand for a powerful memory subsystem which leads to enhancement in the size of caches in multicore processors. Caches are responsible for giving processing elements a faster, higher bandwidth local memory to work with. In this chapter, an attempt has been made to analyze the impact of cache size on performance of Multi-core processors by varying L1 and L2 cache size on the multicore processor with internal network (MPIN) referenced from NIAGRA architecture. As the number of core's increases, traditional on-chip interconnects like bus and crossbar proves to be low in efficiency as well as suffer from poor scalability. In order to overcome the scalability and efficiency issues in these conventional interconnect, ring based design has been proposed. The effect of interconnect on the performance of multicore processors has been analyzed and a novel scalable on-chip interconnection mechanism (INOC) for multicore processors has been proposed. The benchmark results are presented by using a full system simulator. Results show that, using the proposed INoC, compared with the MPIN; the execution time are significantly reduced.

Physical Layer Design of High-Performance Wireless Transmission for Critical Control Applications

2017 ◽  
Vol 13 (6) ◽  
pp. 2844-2854 ◽  
Author(s):  
Michele Luvisotto ◽  
Zhibo Pang ◽  
Dacfey Dzung ◽  
Ming Zhan ◽  
Xiaolin Jiang
Keyword(s):  
High Performance ◽  
Physical Layer ◽  
Wireless Transmission ◽  
Control Applications

A Novel Approach in Scheduling Of the Real- Time Tasks In Heterogeneous Multicore Processor with Fuzzy Logic Technique For Micro-grid Power Management

2018 ◽  
Vol 9 (1) ◽  
pp. 80
Author(s):  
Lavanya Dhanesh ◽  
P. Murugesan
Keyword(s):  
Fuzzy Logic ◽  
Real Time ◽  
Power Management ◽  
Execution Time ◽  
High Performance ◽  
Scheduling Algorithm ◽  
Multicore Processor ◽  
Heterogeneous Multicore ◽  
Micro Grid ◽  
Low Performance

Scheduling of tasks based on real time requirement is a major issue in the heterogeneous multicore systemsfor micro-grid power management . Heterogeneous multicore processor schedules the serial tasks in the high performance core and parallel tasks are executed on the low performance cores. The aim of this paper is to implement a scheduling algorithm based on fuzzy logic for heterogeneous multicore processor for effective micro-grid application. Real – time tasks generally have different execution time and dead line. The main idea is to use two fuzzy logic based scheduling algorithm, first is to assign priority based on execution time and deadline of the task. Second , the task which has assigned higher priority get allotted for execution in high performance core and remaining tasks which are assigned low priority get allotted in low performance cores. The main objective of this scheduling algorithm is to increase the throughput and to improve CPU utilization there by reducing the overall power consumption of the micro-grid power management systems. Test cases with different task execution time and deadline were generated to evaluate the algorithms using  MATLAB software.

Spike: A GPU Optimised Spiking Neural Network Simulator

2018 ◽  
Author(s):  
Nasir Ahmad ◽  
James B. Isbister ◽  
Toby St. Clere Smithe ◽  
Simon M. Stringer
Keyword(s):  
Neural Network ◽  
High Performance ◽  
Internal Variables ◽  
Spiking Neural Network ◽  
Network Simulator ◽  
Synaptic Inputs ◽  
Active Synapse ◽  
Order Of Magnitude ◽  
Gpu Parallelism ◽  
Simulation Time

ABSTRACTSpiking Neural Network (SNN) simulations require internal variables – such as the membrane voltages of individual neurons and their synaptic inputs – to be updated on a sub-millisecond resolution. As a result, a single second of simulation time requires many thousands of update calculations per neuron. Furthermore, increases in the scale of SNN models have, accordingly, led to manyfold increases in the runtime of SNN simulations. Existing solutions to this problem of scale include high performance CPU based simulators capable of multithreaded execution (“CPU parallelism”). More recent GPU based simulators have emerged, which aim to utilise GPU parallelism for SNN execution. We have identified several key speedups, which give GPU based simulators up to an order of magnitude performance increase over CPU based simulators on several benchmarks. We present the Spike simulator with three key optimisations: timestep grouping, active synapse grouping, and delay insensitivity. Combined, these optimisations massively increase the speed of executing a SNN simulation and produce a simulator which is, on a single machine, faster than currently available simulators.

Uncertainty Quantification of Molten Hafnium Infusion Into a B4C Packed-Bed

2019 ◽  
Author(s):  
Arturo Schiaffino ◽  
V. M. Krushnarao Kotteda ◽  
Vinod Kumar ◽  
Arturo Bronson ◽  
Sanjay Shantha-Kumar
Keyword(s):  
Uncertainty Quantification ◽  
High Performance Computing ◽  
Molten Metal ◽  
High Performance ◽  
Control Volume ◽  
Packed Bed ◽  
Network Simulator ◽  
Matrix Composites ◽  
Formidable Challenge ◽  
Performance Computing

Abstract In the manufacturing of metal matrix composites (MMC), liquid-metal reactive infusion with a solid mesh or particles composed of ceramic or metal may be used. The objective of this study is to determine the uncertainty quantification of the modeling of liquid hafnium infusion to expedite the processing and improve properties of MMCs ultimately. Uncertainty quantification (UQ) characterized the uncertainty scientifically especially for high-performance computing with observed physics and/or chemistry of the phenomena and predicted from estimated parameters. In this work, molten hafnium infusing through a boron carbide packed bed is modeled to optimize the manufacturing of components used for a hypersonic vehicle. The creation of molten matrix composites by the infiltration of molten metal represents a formidable challenge to be accurately modeled. First, the structural randomness associated with porous mediums complicates the prediction of the flow passing through it. Secondly, the properties of the molten metal could vary inside our control volume, since the temperature inside the control volume is not constant. Also, there are several chemical reactions and solidification rates occurring in during the impregnation. Given the recent advances in high-performance computing, an in-house pore network simulator are implemented along with Dakota, an open-source, exascale software, to determine the optimal parameters (e.g., porosity and temperature) and uncertainty quantification for the modeling.

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