scholarly journals A 900 μm2 BiCMOS Temperature Sensor for Dynamic Thermal Management

Sensors ◽  
2020 ◽  
Vol 20 (13) ◽  
pp. 3725
Author(s):  
Hernán Aparicio ◽  
Pablo Ituero
Keyword(s):  
Thermal Management ◽  
High Performance ◽  
Thermal Characteristics ◽  
Sampling Period ◽  
Maximum Error ◽  
Cmos Technology ◽  
Dynamic Thermal Management ◽  
Period 2 ◽  
On Chip ◽  
Electronic Technologies

The extreme miniaturization of electronic technologies has turned varying and unpredictable temperatures into a first-class concern for high performance processors which mitigate the problem employing dynamic thermal managements control systems. In order to monitor the thermal profile of the chip, these systems require a collection of on-chip temperature sensors with strict demands in terms of area and power overhead. This paper introduces a sensor topology specially tailored for these requirements. Targeting the 40 nm CMOS technology node, the proposed sensor uses both bipolar and CMOS transistors, benefiting from the stable thermal characteristics of the former and the compactness and speed of the latter. The sensor has been fully characterized through extensive post-layout simulations for a temperature range of 0 ∘ C to 100 ∘ C , achieving a maximum error of ±0.9 ∘ C / considering 3 σ yield and a resolution of 0.5 ∘ C . The area—900 μ m 2 , energy per conversion—1.06 nJ, and sampling period—2 μ s, are very competitive compared to previous works in the literature.

Design of a Reconfigurable Coprocessor for Double Precision Floating Point Matrix Algorithms

2011 ◽  
Vol 58-60 ◽  
pp. 1037-1042
Author(s):  
Sheng Long Li ◽  
Zhao Lin Li ◽  
Qing Wei Zheng
Keyword(s):  
High Performance ◽  
Cmos Technology ◽  
General Purpose ◽  
Floating Point ◽  
Double Precision ◽  
Synthesis Time ◽  
Matrix Algorithms ◽  
Matrix Operations ◽  
On Chip ◽  
Software Execution

Double precision floating point matrix operations are wildly used in a variety of engineering and scientific computing applications. However, it’s inefficient to achieve these operations using software approaches on general purpose processors. In order to reduce the processing time and satisfy the real-time demand, a reconfigurable coprocessor for double precision floating point matrix algorithms is proposed in this paper. The coprocessor is embedded in a Multi-Processor System on Chip (MPSoC), cooperates with an ARM core and a DSP core for high-performance control and calculation. One algorithm in GPS applications is taken for example to illustrate the efficiency of the coprocessor proposed in this paper. The experiment result shows that the coprocessor can achieve speedup a factor of 50 for the quaternion algorithm of attitude solution in inertial navigation application compare with software execution time of a TI C6713 DSP. The coprocessor is implemented in SMIC 0.13μm CMOS technology, the synthesis time delay is 9.75ns, and the power consumption is 63.69 mW when it works at 100MHz.

Temperature Sensor Allocation Strategy and Full Thermal Reconstruction for Microprocessors

2013 ◽  
Vol 380-384 ◽  
pp. 2986-2989
Author(s):  
Xin Li ◽  
Meng Tian Rong
Keyword(s):  
Thermal Management ◽  
Thermal Gradient ◽  
Gradient Analysis ◽  
Hot Spot ◽  
Temperature Sensors ◽  
Thermal Sensors ◽  
Dynamic Thermal Management ◽  
Effective Strategies ◽  
Management Techniques ◽  
On Chip

On-chip thermal sensors are employed by dynamic thermal management techniques to measure runtime thermal behavior of microprocessors so as to prevent the on-set of high temperatures. The allocation and the placement of thermal sensors directly impact the effectiveness of the dynamic thermal management mechanisms. In this paper, we propose systematic and effective strategies for determining the optimal locations for temperature sensors based on thermal gradient analysis to provide the trade-off between hot spot estimation and full thermal reconstruction. Experimental results indicate the superiority of our techniques and confirm that our proposed methods are able to create a sensor distribution for a given microprocessor architecture.

Dynamic Thermal Management for system-on-chip using bus arbitration

2010 ◽  
Author(s):  
K. Srivathsa Sudheendra ◽  
B. Suresh Vikram ◽  
Pavan Panchapakeshan ◽  
Sandip Kundu
Keyword(s):  
Thermal Management ◽  
System On Chip ◽  
Dynamic Thermal Management ◽  
Bus Arbitration ◽  
On Chip

Effect of Thermal Contact Resistance on Optimum Mini-Contact TEC Cooling of On-Chip Hot Spots

2009 ◽  
Author(s):  
Viatcheslav Litvinovitch ◽  
Avram Bar-Cohen
Keyword(s):  
Contact Resistance ◽  
Thermal Management ◽  
Hot Spots ◽  
High Performance ◽  
Thermal Contact Resistance ◽  
Hot Spot ◽  
Thermal Contact ◽  
Heat Fluxes ◽  
Thermoelectric Coolers ◽  
On Chip

Shrinking feature size and increasing transistor density, combined with the high performance demanded from next-generation microprocessors and other electronic components, have lead to the emergence of severe on-chip “hot spots,” with heat fluxes approaching — and at times exceeding — 1 kW/cm2. The cost-effective thermal management of such chips requires the introduction and refinement of novel cooling techniques. Mini-contact enhanced, miniaturized thermoelectric coolers (TECs) have been shown to be a viable approach for the remediation of on-chip hot spots, but their performance is constrained by the thermal resistance introduced by the attachment of this thermal management device. This paper uses a detailed finite-element package-level model to examine the parasitic effects of the thermal contact resistance (at the interfaces of the mini-contact and TEC) on the cooling efficacy of this thermal solution. Particular attention is devoted to the deleterious effect of contact resistance on the thermoelectric leg height and the mini-contact size required to achieve the greatest hot spot temperature reduction on the chip. Data from experiments with TECs (with a leg height of 130 μm) combined with several sizes of mini-contact pads, are used to validate the modeling approach and the overall conclusions.

scholarly journals Hierarchical Dynamic Thermal Management Method for High-Performance Many-Core Microprocessors

2016 ◽  
Vol 22 (1) ◽  
pp. 1-21 ◽  
Author(s):  
Hai Wang ◽  
Jian Ma ◽  
Sheldon X.-D. Tan ◽  
Chi Zhang ◽  
He Tang ◽  
...  
Keyword(s):  
Thermal Management ◽  
High Performance ◽  
Dynamic Thermal Management ◽  
Management Method ◽  
Many Core
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