Development of Advanced High Heat Flux Cooling System for Power Electronics

Recent development in electronic devices with increased heat dissipation requires severe cooling conditions and an efficient method for heat removal is needed for the cooling under high heat flux conditions. Most researches are concentrated on small semiconductors with high heat flux density, while almost no existing researches concerning the cooling of a large semiconductor, i.e. power electronics, with high heat generation density from a large cooling area. A narrow channel between parallel plates is one of ideal structures for the application of boiling phenomena which uses the cooling for such large semiconductors. To develop high-performance cooling systems for power electronics, experiments on increase in critical heat flux (CHF) for flow boiling in narrow channels by improved liquid supply was conducted. To realize the cooling of large areas at extremely high heat flux under the conditions for a minimum gap size and a minimum flow rate of liquid supplied, the structure with auxiliary liquid supply was devised to prevent the extension of dry-patches underneath flattened bubbles generated in a narrow channel. The heating surface was experimented in two channels with different dimensions. The heating surfaces have the width of 30mm and the lengths of 50mm and 150mm in the flow direction. A large width of actual power electronics is realizable by the parallel installation of the same channel structure in the transverse direction. The cooling liquid is additionally supplied via sintered metal plates from the auxiliary unheated channels located at sides or behind the main heated channel. To supply the liquid to the entire heating surface, fine grooves are machined on the heating surface for enhance the spontaneous liquid supply by the aid of capillary force. The gap size of narrow channels are varied as 0.7mm, 2mm and 5mm. Distribution of liquid flow rate to the main heated channel and the auxiliary unheated channels were varied to investigate its effect on the critical heat flux. Test liquids employed are R113, FC72 and water. The systematic experiments by using water as a test liquid were conducted. Critical heat flux values larger than 2×106W/m2 were obtained at both gap sizes of 2mm and 5mm for a heated length of 150mm. A very high heat transfer coefficient as much as 1×105W/m2K was obtained at very high heat flux near CHF for the gap size of 2mm. This paper is a summary of experimental results obtained in the past by the present authors.

Double-Sided Microchannel Cooling of a Power Electronics Module Using Power Overlay

In the continuing effort to alleviate the increasing thermal loads for power electronics devices, numerous aggressive solutions have been developed, such as small-scale micro-channel heat exchangers. Although these methods can improve overall surface heat transfer to the order of 500 W cm−2, they are limited to single-sided cooling due to the typical wire-bonded electrical connections of the devices. Power overlay (POL) technology provides a stable planar structure for electrical connection, as well as attachment of an additional top-side heat exchanger. This study presents an analysis of double-sided microchannel cooling of a power electronics module. Two optimized, integral micro-channel heat sinks were attached above and below silicon power devices, with more traditional attachment on one side and a POL interface on the other. A compliant TIM was selected for low thermal resistance and good mechanical response, which allowed top-side connection to the POL surface. A theoretical model is presented that predicts the benefit of double-sided cooling based on the known performance of a single-sided heat sink and given addition thermal contact resistance for the top side. For microchannels with water, an enhancement of 26% was predicted. An experiment was also carried out to measure the actual performance benefit seen with double-sided cooling. An enhancement of over 30% was measured for a particular design. As the theory predicts, the benefit of double-sided cooling is limited for high performance designs. However, double-sided cooling could lead to high levels of thermal performance using low-performance technology.

Improving Flow Circulation in Heat Sinks Using Quadrupole Vortices

In this paper, we show that improved air circulation above a heat sink is possible using thin winglet-type vortex generators that can be passively retrofitted to an existing unit. By mounting these vortex generators on the leading edge of heat sink fins, pairs of counter-rotating vortices are induced within the interfin spacing. The vortices disturb the boundary layers and serve to mix the air in the interfin channel. The devices we have designed are passive and can be added to existing systems using a simple clip-on mechanism. In this study, several designs are experimentally investigated for the purpose of identifying the optimal configuration that will be most conducive to flow enhancement and, therefore, heat transfer augmentation. Using the typical operational range of air velocities for PCs, routers and servers, an experimental simulation of the interfin channel reveals that certain vortex generators, when placed upstream, can outperform others in their ability to fill the channel with pairs of strong vortices. Multiple pairs can also be generated to further accentuate the heat transfer using dual vortex generators. A description of the specific shapes is furnished here along with particulars of the performance study. By control and manipulation of the vortices, our results suggest the possibility of optimizing the generator design. Experimentation was conducted in two phases. The first phase is a study of the ability to generate and control vortices within the fin channel. This aspect was simulated using a Lexan mock-up of the fin channel that permits introduction of glycerin smoke to visualize the shape, size, strength and structure of the vortices. The clear Lexan permitted viewing of the vortices by passing a red planar laser through the apparatus. The second phase involved using the optimization data gained in the first phase to generate vortices in an actual heat sink fitted with thermocouples to measure the temperatures at various points during heating.

An Experimental Investigation of Flow Boiling Characteristics in a Single Transparent Heated Microtube

In the present study, flow boiling in a transparent heated microtube having a diameter of 1 mm was investigated in detail. The transparent heated tube was manufactured by the electroless gold plating method. The enclosed gas-liquid interface could be clearly recognized through the tube wall, and the inner wall temperature measurement and direct heating of the film were simultaneously conducted by using the tube. Deaerated and deionized water that was subcooled temperature of 15 K was used as a test fluid, and constant and stable mass velocities of 50, 100, and 200 kg/m2s were provided by using a twin plunger pump. Among our experimental results, a vapor bubble grew up in a direction opposite the flow at a low heat flux and low mass velocities; however, this flow pattern was not observed at a high mass velocity of 200 kg/m2s. Under the conditions of G = 50 kg/m2s and high heat flux, the liquid film surrounding an elongated bubble near the heated tube wall occasionally thickened partially. The inner wall temperature exhibited large random oscillations in this regime; however, the visual observation revealed that dry-patches did not occur. The mass velocity had a negligible effect on the boiling heat transfer except in the counter-growth bubble flow regime.

Thermo-Mechanical Reliability of Through Silicon Vias (TSVs) and Solder Interconnects in 3-Dimensional Integrated Circuits

3-dimensional integrated circuit (3D IC) is a promising technology in today’s IC packaging industry. Since the technology is in infancy stages, many aspects of this technology are still under heavy investigation. Reliability of through silicon via (TSV) interconnects and interlayer bonding between the silicon layers are issues that become more complicated in 3D ICs due to complexity of the architecture and miniaturized interconnects. Optimizing design of these devices is essential in order to avoid short fatigue life of interconnects. This manuscript addresses the impact of design parameters such as die thickness, TSV diameter, TSV pitch, underfill thickness and underfill properties on thermo-mechanical durability of Direct Chip Attach (DCA) solder joints and TSV interconnects used in a 3D IC packages. A design was proposed where DCA is used to connect 4 layers of ICs and TSVs are used to connect the active layer of the dies to the second silicon layer. Solder joints, as small as 50-micron diameter, were used to attach silicon layers. A numerical experiment is designed to vary design parameters at 3 levels using L9 ortagonal array. A 3-dimensional model of the package was built and model was solved under an accelerated temperature cycle loading. Solder is considered as visco-plastic material and copper interconnects are assumed to follow bilinear isotropic hardening behavior. Two continuum damage models, energy partitioning and Coffin-Manson models, were used to assess the number of cycles to failure for solder joints and TSV copper interconnects respectively. Minitab software was used to analyze the result of experiment. The most influential factors on durability of solder interconnect are found to be underfill properties and height. However, the most influential factor on TSV durability is found to be TSV diameter. A non-linear response was observed for TSV pitch and diameter indicating that the optimum level may be in the range selected.

Novel Fluorescent Visualization Method to Characterize Transport Properties in Micro/Nano Heat Pipe Wick Structures

Heat pipes have been gaining a lot of popularity in electronics cooling applications due to their ease of operation, reliability, and high effective thermal conductivity. An important component of a heat pipe is the wick structure, which transports the condensate from condenser to evaporator. The design of wick structures is complicated by competing requirements to create high capillary driving forces and maintain high permeability. While generating large pore sizes will help achieve high permeability, it will significantly reduce the wick’s capillary performance. This study presents a novel experimental method to simultaneously measure capillary and permeability characteristics of the wick structures using fluorescent visualization. This technique will be used to study the effects of pore size and gravitational force on the flow-related properties of the wick structures. Initial results are presented on wick samples visually characterized from zero to nine g acceleration on a centrifuge. These results will provide a tool to understand the physics involved in transport through porous structures and help in the design of high performance heat pipes.

Fast Thermal Analysis of Vertically Integrated Circuits (3-D ICs) Using Power Blurring Method

CMOS VLSI technology has been facing various technical challenges as the feature sizes scale down. To overcome the challenges imposed by the shrink of the conventional on-chip interconnect system in IC chips, alternative interconnect technologies are being developed: one of them is three dimensional chips (3D ICs). Even though 3D IC technology is a promising solution for interconnect bottlenecks, thermal issues can be exacerbated. Thermal-aware design and optimization will be more critical in 3D IC technology than conventional planar IC technology, and hence accurate temperature profiles of each active layer will become very important. In 3D ICs, temperature profile of one layer depends not only on its own power dissipation but also on the heat transferred from other layers. Thus, thermal considerations for 3D ICs need to be done in a holistic manner even if each layer can be designed and fabricated individually. Conventional grid-based temperature computation methods are accurate but are computationally expensive, especially for 3D ICs. To increase computational efficiency, we developed a matrix convolution technique, called Power Blurring (PB) for 3D ICs. The temperature resulting from any arbitrary power dissipation in each layer of the 3D chip can be computed quickly. The PB method has been validated against commercial FEA software, ANSYS. Our method yields good results with maximum error less than 2% for various case studies and reduces the computation time by a factor of ∼ 60. The additional advantage is the possibility to evaluate different power dissipation profiles without the need to re-mesh the whole 3D chip structure.

Thermal Performance of Laminate-to-Aluminum Attachment Materials

A non-destructive method was used to determine the effects of thermal cycling on the thermal performance of a PCB attached to an aluminum substrate with a thermal adhesive. This method allows for a comparison of the thermal performance of various TIMs in an industrial application. Testing was done on FR4 and Flex boards, both with and without overmolding, attached using PSA and an alternative adhesive. Baseline measurements were taken, then the boards were cycled from −40 to 125°C on a 90-minute cycle with 15-minute dwells at the target temperatures. It was found that both adhesives showed an increase in thermal conductivity, possibly due to curing, and delamination occurred at 17 out of 35 locations with the alternative adhesive within the first 1000 cycles while no delamination occurred with the PSA.

Nonlinear Response of a Printed Circuit Board in Shock

This work focuses on deformation mechanisms taking place in a Printed Circuit Board (PCB) exposed to high impact shock. A combined experimental, theoretical, and numerical approach has been applied to address both the nature of the observed deformation and its modeling and test metrology implications. Experimental evidence overwhelmingly indicates that a PCB in both test and system applications undergoes nonlinear deformations. Geometric nonlinearity of board response is attributed to the elevated in-plane (membrane) stresses that develop when a drop height and/or inertia forces are significant. The impact of these stresses on deformations (board strain) was quantified using a specially designed test. Membrane stresses were also accounted for in a numerical (Finite Element Method) model developed and carefully validated in the course of this study. The model shows a very good agreement with test data. The nonlinearity of PCB deformation in shock, i.e. the fact that both bending moments and in-plane forces are present in the board has important implications on test metrology development and on correlation between the measured board strain and stresses in interconnects of surface mounted components. Of special importance is the impact that nonlinearity can have on development of transfer functions between strain measurements on system boards and strain measurements on test boards, which is also addressed in the paper.

Integrating an Electronics Component Database Into a Thermal Design Tool

When developing a thermal model of a highly populated electronics board, a significant amount of time and effort is needed to track the thermal characteristics of all the dissipating components. In business sectors where multiple boards are thermally designed and analyzed each year, developing a components database and integrating it into the analysis tool will save time and ensure that consistent values are used in every design. With an “in tool” component database, multiple advantages are achieved. Once a component is entered into the database, the component information can be accessed in subsequent designs that employ the component. All engineers doing thermal design have access to the database. Once the thermal characteristics of a component are agreed upon, consistency across all boards is maintained. Additionally, values for each component in the database can be automatically brought into the analysis tool. By making a computer program develop the model of the component, human error is removed. The database tracks all major thermal aspects of a component. This includes the maximum junction temperature, Theta JC (case to junction resistance), leg/pin configuration (size, length, number, conductivity), and board to case gap thickness. Optional values can include top side cooling resistance, performance temperature limits, manufacturer, datasheet web address, and even an entry to identify the configuring engineer.