Fast Thermal Analysis of Vertically Integrated Circuits (3-D ICs) Using Power Blurring Method

CMOS VLSI technology has been facing various technical challenges as the feature sizes scale down. To overcome the challenges imposed by the shrink of the conventional on-chip interconnect system in IC chips, alternative interconnect technologies are being developed: one of them is three dimensional chips (3D ICs). Even though 3D IC technology is a promising solution for interconnect bottlenecks, thermal issues can be exacerbated. Thermal-aware design and optimization will be more critical in 3D IC technology than conventional planar IC technology, and hence accurate temperature profiles of each active layer will become very important. In 3D ICs, temperature profile of one layer depends not only on its own power dissipation but also on the heat transferred from other layers. Thus, thermal considerations for 3D ICs need to be done in a holistic manner even if each layer can be designed and fabricated individually. Conventional grid-based temperature computation methods are accurate but are computationally expensive, especially for 3D ICs. To increase computational efficiency, we developed a matrix convolution technique, called Power Blurring (PB) for 3D ICs. The temperature resulting from any arbitrary power dissipation in each layer of the 3D chip can be computed quickly. The PB method has been validated against commercial FEA software, ANSYS. Our method yields good results with maximum error less than 2% for various case studies and reduces the computation time by a factor of ∼ 60. The additional advantage is the possibility to evaluate different power dissipation profiles without the need to re-mesh the whole 3D chip structure.

Double-Sided Microchannel Cooling of a Power Electronics Module Using Power Overlay

In the continuing effort to alleviate the increasing thermal loads for power electronics devices, numerous aggressive solutions have been developed, such as small-scale micro-channel heat exchangers. Although these methods can improve overall surface heat transfer to the order of 500 W cm−2, they are limited to single-sided cooling due to the typical wire-bonded electrical connections of the devices. Power overlay (POL) technology provides a stable planar structure for electrical connection, as well as attachment of an additional top-side heat exchanger. This study presents an analysis of double-sided microchannel cooling of a power electronics module. Two optimized, integral micro-channel heat sinks were attached above and below silicon power devices, with more traditional attachment on one side and a POL interface on the other. A compliant TIM was selected for low thermal resistance and good mechanical response, which allowed top-side connection to the POL surface. A theoretical model is presented that predicts the benefit of double-sided cooling based on the known performance of a single-sided heat sink and given addition thermal contact resistance for the top side. For microchannels with water, an enhancement of 26% was predicted. An experiment was also carried out to measure the actual performance benefit seen with double-sided cooling. An enhancement of over 30% was measured for a particular design. As the theory predicts, the benefit of double-sided cooling is limited for high performance designs. However, double-sided cooling could lead to high levels of thermal performance using low-performance technology.

Improving Flow Circulation in Heat Sinks Using Quadrupole Vortices

In this paper, we show that improved air circulation above a heat sink is possible using thin winglet-type vortex generators that can be passively retrofitted to an existing unit. By mounting these vortex generators on the leading edge of heat sink fins, pairs of counter-rotating vortices are induced within the interfin spacing. The vortices disturb the boundary layers and serve to mix the air in the interfin channel. The devices we have designed are passive and can be added to existing systems using a simple clip-on mechanism. In this study, several designs are experimentally investigated for the purpose of identifying the optimal configuration that will be most conducive to flow enhancement and, therefore, heat transfer augmentation. Using the typical operational range of air velocities for PCs, routers and servers, an experimental simulation of the interfin channel reveals that certain vortex generators, when placed upstream, can outperform others in their ability to fill the channel with pairs of strong vortices. Multiple pairs can also be generated to further accentuate the heat transfer using dual vortex generators. A description of the specific shapes is furnished here along with particulars of the performance study. By control and manipulation of the vortices, our results suggest the possibility of optimizing the generator design. Experimentation was conducted in two phases. The first phase is a study of the ability to generate and control vortices within the fin channel. This aspect was simulated using a Lexan mock-up of the fin channel that permits introduction of glycerin smoke to visualize the shape, size, strength and structure of the vortices. The clear Lexan permitted viewing of the vortices by passing a red planar laser through the apparatus. The second phase involved using the optimization data gained in the first phase to generate vortices in an actual heat sink fitted with thermocouples to measure the temperatures at various points during heating.

An Experimental Investigation of Flow Boiling Characteristics in a Single Transparent Heated Microtube

In the present study, flow boiling in a transparent heated microtube having a diameter of 1 mm was investigated in detail. The transparent heated tube was manufactured by the electroless gold plating method. The enclosed gas-liquid interface could be clearly recognized through the tube wall, and the inner wall temperature measurement and direct heating of the film were simultaneously conducted by using the tube. Deaerated and deionized water that was subcooled temperature of 15 K was used as a test fluid, and constant and stable mass velocities of 50, 100, and 200 kg/m2s were provided by using a twin plunger pump. Among our experimental results, a vapor bubble grew up in a direction opposite the flow at a low heat flux and low mass velocities; however, this flow pattern was not observed at a high mass velocity of 200 kg/m2s. Under the conditions of G = 50 kg/m2s and high heat flux, the liquid film surrounding an elongated bubble near the heated tube wall occasionally thickened partially. The inner wall temperature exhibited large random oscillations in this regime; however, the visual observation revealed that dry-patches did not occur. The mass velocity had a negligible effect on the boiling heat transfer except in the counter-growth bubble flow regime.

Thermo-Mechanical Reliability of Through Silicon Vias (TSVs) and Solder Interconnects in 3-Dimensional Integrated Circuits

3-dimensional integrated circuit (3D IC) is a promising technology in today’s IC packaging industry. Since the technology is in infancy stages, many aspects of this technology are still under heavy investigation. Reliability of through silicon via (TSV) interconnects and interlayer bonding between the silicon layers are issues that become more complicated in 3D ICs due to complexity of the architecture and miniaturized interconnects. Optimizing design of these devices is essential in order to avoid short fatigue life of interconnects. This manuscript addresses the impact of design parameters such as die thickness, TSV diameter, TSV pitch, underfill thickness and underfill properties on thermo-mechanical durability of Direct Chip Attach (DCA) solder joints and TSV interconnects used in a 3D IC packages. A design was proposed where DCA is used to connect 4 layers of ICs and TSVs are used to connect the active layer of the dies to the second silicon layer. Solder joints, as small as 50-micron diameter, were used to attach silicon layers. A numerical experiment is designed to vary design parameters at 3 levels using L9 ortagonal array. A 3-dimensional model of the package was built and model was solved under an accelerated temperature cycle loading. Solder is considered as visco-plastic material and copper interconnects are assumed to follow bilinear isotropic hardening behavior. Two continuum damage models, energy partitioning and Coffin-Manson models, were used to assess the number of cycles to failure for solder joints and TSV copper interconnects respectively. Minitab software was used to analyze the result of experiment. The most influential factors on durability of solder interconnect are found to be underfill properties and height. However, the most influential factor on TSV durability is found to be TSV diameter. A non-linear response was observed for TSV pitch and diameter indicating that the optimum level may be in the range selected.

Novel Fluorescent Visualization Method to Characterize Transport Properties in Micro/Nano Heat Pipe Wick Structures

Heat pipes have been gaining a lot of popularity in electronics cooling applications due to their ease of operation, reliability, and high effective thermal conductivity. An important component of a heat pipe is the wick structure, which transports the condensate from condenser to evaporator. The design of wick structures is complicated by competing requirements to create high capillary driving forces and maintain high permeability. While generating large pore sizes will help achieve high permeability, it will significantly reduce the wick’s capillary performance. This study presents a novel experimental method to simultaneously measure capillary and permeability characteristics of the wick structures using fluorescent visualization. This technique will be used to study the effects of pore size and gravitational force on the flow-related properties of the wick structures. Initial results are presented on wick samples visually characterized from zero to nine g acceleration on a centrifuge. These results will provide a tool to understand the physics involved in transport through porous structures and help in the design of high performance heat pipes.

Development of Advanced High Heat Flux Cooling System for Power Electronics

Recent development in electronic devices with increased heat dissipation requires severe cooling conditions and an efficient method for heat removal is needed for the cooling under high heat flux conditions. Most researches are concentrated on small semiconductors with high heat flux density, while almost no existing researches concerning the cooling of a large semiconductor, i.e. power electronics, with high heat generation density from a large cooling area. A narrow channel between parallel plates is one of ideal structures for the application of boiling phenomena which uses the cooling for such large semiconductors. To develop high-performance cooling systems for power electronics, experiments on increase in critical heat flux (CHF) for flow boiling in narrow channels by improved liquid supply was conducted. To realize the cooling of large areas at extremely high heat flux under the conditions for a minimum gap size and a minimum flow rate of liquid supplied, the structure with auxiliary liquid supply was devised to prevent the extension of dry-patches underneath flattened bubbles generated in a narrow channel. The heating surface was experimented in two channels with different dimensions. The heating surfaces have the width of 30mm and the lengths of 50mm and 150mm in the flow direction. A large width of actual power electronics is realizable by the parallel installation of the same channel structure in the transverse direction. The cooling liquid is additionally supplied via sintered metal plates from the auxiliary unheated channels located at sides or behind the main heated channel. To supply the liquid to the entire heating surface, fine grooves are machined on the heating surface for enhance the spontaneous liquid supply by the aid of capillary force. The gap size of narrow channels are varied as 0.7mm, 2mm and 5mm. Distribution of liquid flow rate to the main heated channel and the auxiliary unheated channels were varied to investigate its effect on the critical heat flux. Test liquids employed are R113, FC72 and water. The systematic experiments by using water as a test liquid were conducted. Critical heat flux values larger than 2×106W/m2 were obtained at both gap sizes of 2mm and 5mm for a heated length of 150mm. A very high heat transfer coefficient as much as 1×105W/m2K was obtained at very high heat flux near CHF for the gap size of 2mm. This paper is a summary of experimental results obtained in the past by the present authors.

Quantum Simulation of Nanocrystalline Composite Thermoelectric Properties

For the past few years, nanoscale structures have been proposed and investigated experimentally for their enhanced thermoelectric properties over bulk materials. These structures offer several advantages: 1) increased local density of states, which can improve the Seebeck coefficient and 2) reduced thermal transport due to phonon confinement and increased scattering. Recently, nanocrystalline composites (NCC) have been examined for their ability to outperform the alloy limit in terms of reduced thermal conductivity. However, the electrical performance has not been examined from a quantum point of view. This work provides quantum simulations of a two-dimensional composite system meant to model certain geometric features of NCC’s. While the results cannot be quantitatively compared to actual measurements, they show how their electrical behavior differs from well-known superlattice devices. This work will aid in the design of the next generation of NCC devices for thermoelectric performance.

PCR for Derivation of Parameter Dependencies, Thermo-Mechanical Norris-Landzberg Acceleration Factors, Goldmann Fatigue Constants for Leadfree Electronics

Goldmann Constants and Norris-Landzberg acceleration factors for lead-free solders have been developed based on principal component regression models (PCR) for reliability prediction and part selection of area-array packaging architectures under thermo-mechanical loads. Models have been developed in conjunction with Stepwise Regression Methods for identification of the main effects. Package architectures studied include, BGA packages mounted on copper-core and no-core printed circuit assemblies in harsh environments. The models have been developed based on thermo-mechanical reliability data acquired on copper-core and no-core assemblies in four different thermal cycling conditions. Packages with Sn3Ag0.5Cu solder alloy interconnects have been examined. The models have been developed based on perturbation of accelerated test thermo-mechanical failure data. Data has been gathered on nine different thermal cycle conditions with SAC305 alloys. The thermal cycle conditions differ in temperature range, dwell times, maximum temperature and minimum temperature to enable development of constants needed for the life prediction and assessment of acceleration factors. Goldmann Constants and the Norris-Landzberg acceleration factors have been benchmarked against previously published values. In addition, model predictions have been validated against validation data-sets which have not been used for model development. Convergence of statistical models with experimental data has been demonstrated using a single factor design of experiment study for individual factors including temperature cycle magnitude, relative coefficient of thermal expansion, and diagonal length of the chip. The predicted and measured acceleration factors have also been computed and correlated. Good correlations have been achieved for parameters examined. Previously, the feasibility of using multiple linear regression models for reliability prediction has been demonstrated for flex-substrate BGA packages [Lall 2004, 2005], flip-chip packages [Lall 2005] and ceramic BGA packages [Lall 2007]. The presented methodology is valuable in the development of fatigue damage constants for the application specific accelerated test data-sets and provides a method to develop institutional learning based on prior accelerated test data.

Thermal Performance of a Mini Liquid-Cooled Cold Plates for Robot Cooling

Thermal performance for mini water-cooled cold plates covered with non-metallic polycarbonate (PC) is experimentally measured in this study. The mini cold plates are designed to reduce the overall weight of the cooling device for effective heat dissipation from a humanoid robot. The water-cooled cold plate has a 10×10 mm2 of base plate which is made of copper or aluminum. Two different types of enhanced surfaces are considered in the present study: copper pin-finned surface of 0.5×0.5 mm2 area and 1.5 mm high with 0.5 mm fin spacing and aluminum foam-finned surface of 92% porosity and 40 PPI (pores per inch). Heat transfer rates are measured according to the input power and the flow rate of cooling water. The surface temperature of the base plate and the cooling water temperatures at inlet and outlet of each cold plate are measured. From the results, it is found that the copper pin-finned cold plate shows better performance than the aluminum foam-finned cold plate in terms of thermal resistance and pressure drop.