scholarly journals Monitoring Illegal Tree Cutting through Ultra-Low-Power Smart IoT Devices

Sensors ◽  
2021 ◽  
Vol 21 (22) ◽  
pp. 7593
Author(s):  
Alessandro Andreadis ◽  
Giovanni Giambene ◽  
Riccardo Zambon
Keyword(s):  
Low Power ◽  
Long Range ◽  
Cost Effective ◽  
Edge Computing ◽  
Forest Monitoring ◽  
Computing Technique ◽  
Ultra Low Power ◽  
Energy Footprint ◽  
Iot Devices ◽  
Tree Cutting

Forests play a fundamental role in preserving the environment and fighting global warming. Unfortunately, they are continuously reduced by human interventions such as deforestation, fires, etc. This paper proposes and evaluates a framework for automatically detecting illegal tree-cutting activity in forests through audio event classification. We envisage ultra-low-power tiny devices, embedding edge-computing microcontrollers and long-range wireless communication to cover vast areas in the forest. To reduce the energy footprint and resource consumption for effective and pervasive detection of illegal tree cutting, an efficient and accurate audio classification solution based on convolutional neural networks is proposed, designed specifically for resource-constrained wireless edge devices. With respect to previous works, the proposed system allows for recognizing a wider range of threats related to deforestation through a distributed and pervasive edge-computing technique. Different pre-processing techniques have been evaluated, focusing on a trade-off between classification accuracy with respect to computational resources, memory, and energy footprint. Furthermore, experimental long-range communication tests have been conducted in real environments. Data obtained from the experimental results show that the proposed solution can detect and notify tree-cutting events for efficient and cost-effective forest monitoring through smart IoT, with an accuracy of 85%.

scholarly journals Rural Healthcare IoT Architecture Based on Low-Energy LoRa

2021 ◽  
Vol 18 (14) ◽  
pp. 7660
Author(s):  
Ace Dimitrievski ◽  
Sonja Filiposka ◽  
Francisco José Melero ◽  
Eftim Zdravevski ◽  
Petre Lameski ◽  
...  
Keyword(s):  
Low Power ◽  
Rural Areas ◽  
Urban Areas ◽  
Well Being ◽  
Battery Life ◽  
Ultra Low Power ◽  
Term Operation ◽  
Doctor Patient Communication ◽  
Connected Health ◽  
Iot Devices

Connected health is expected to introduce an improvement in providing healthcare and doctor-patient communication while at the same time reducing cost. Connected health would introduce an even more significant gap between healthcare quality for urban areas with physical proximity and better communication to providers and the portion of rural areas with numerous connectivity issues. We identify these challenges using user scenarios and propose LoRa based architecture for addressing these challenges. We focus on the energy management of battery-powered, affordable IoT devices for long-term operation, providing important information about the care receivers’ well-being. Using an external ultra-low-power timer, we extended the battery life in the order of tens of times, compared to relying on low power modes of the microcontroller.

An Ultra-Low-Power Long Range Battery/Passive RFID Tag for UHF and Microwave Bands With a Current Consumption of 700 nA at 1.5 V

2007 ◽  
Vol 54 (7) ◽  
pp. 1500-1512 ◽  
Author(s):  
Vijay Pillai ◽  
Harley Heinrich ◽  
David Dieska ◽  
Pavel V. Nikitin ◽  
Rene Martinez ◽  
...  
Keyword(s):  
Low Power ◽  
Long Range ◽  
Ultra Low Power ◽  
Rfid Tag ◽  
Current Consumption ◽  
Passive Rfid ◽  
A Current

scholarly journals Non-Volatile Processor Based on MRAM for Ultra-Low-Power IoT Devices

2017 ◽  
Vol 13 (2) ◽  
pp. 1-23 ◽  
Author(s):  
Sophiane Senni ◽  
Lionel Torres ◽  
Gilles Sassatelli ◽  
Abdoulaye Gamatie
Keyword(s):  
Low Power ◽  
Ultra Low Power ◽  
Iot Devices

scholarly journals Providing Confidentiality and Integrity in Ultra Low Power IoT Devices

2019 ◽  
Author(s):  
Emanuele Valea ◽  
Mathieu Da Silva ◽  
Marie-Lise Flottes ◽  
Giorgio Di Natale ◽  
Sophie Dupuis ◽  
...  
Keyword(s):  
Low Power ◽  
Ultra Low Power ◽  
Iot Devices

Ultra-low-power time-efficient circuitry of dual comparator/amplifier for SAR ADC by CMOS technology

Circuit World ◽  
2020 ◽  
Vol 46 (3) ◽  
pp. 183-192
Author(s):  
Muhammad Yasir Faheem ◽  
Shun'an Zhong ◽  
Xinghua Wang ◽  
Muhammad Basit Azeem
Keyword(s):  
Low Power ◽  
Energy Efficient ◽  
Supply Voltage ◽  
Main Idea ◽  
Cost Effective ◽  
Cmos Technology ◽  
Sar Adc ◽  
Ultra Low Power ◽  
Content Type ◽  
Analogue To Digital

Purpose Successive approximation register (SAR) analogue to digital converter (ADC) is well-known with regard to low-power operations. To make it energy-efficient and time-efficient, scientists are working for the last two decades, and it still needs the attention of the researchers. In actual work, there is no mechanism and circuitry for the production of two simultaneous comparator outputs in SAR ADC. Design/methodology/approach A small-sized, low-power and energy-efficient circuitry of a dual comparator and an amplifier is presented, which is the most important part of SAR ADC. The main idea is to design a multi-dimensional circuit which can deliver two quick parallel comparisons. The circuitry of the three devices is combined and miniaturized by introducing a lower number of MOSFET’s and small-sized capacitors in such a way that there is no need for any matching and calibration. Findings The supply voltage of the proposed comparator is 0.7 V with the overall power consumption of 0.257mW. The input and clock frequencies are 5 and 50 MHz, respectively. There is no requirement for any offset calibration and mismatching concerns due to sharing and centralization of spider-latch circuitry. The total offset voltages are 0.13 0.31 mV with 0.3VDD to VDD. All the components are small-sized and miniaturized to make the circuit cost-effective and energy-efficient. The rise and response time of comparator is around 100 ns. SNDR improved from 56 to 65 dB where the input-referred noise of an amplifier is 98mVrms. Originality/value The proposed design has no linear-complexity compared with the conventional comparator in both modes (working and standby); it is ultimately intended and designed for 11-bit SAR ADC. The circuit based on three rapid clock pulses for three different modes includes amplification and two parallel comparisons controlled and switched by a latch named as “spider-latch”.

scholarly journals A Novel 8T Cell-Based Subthreshold Static RAM for Ultra-Low Power Platform Applications

Electronics ◽  
2020 ◽  
Vol 9 (6) ◽  
pp. 928 ◽  
Author(s):  
Taehoon Kim ◽  
Sivasundar Manisankar ◽  
Yeonbae Chung
Keyword(s):  
Low Power ◽  
Low Voltage ◽  
Cost Effective ◽  
Operating Mode ◽  
Sleep Mode ◽  
Cmos Process ◽  
Operating Voltage ◽  
Cross Point ◽  
Ultra Low Power ◽  
Static Ram

Subthreshold SRAMs profit various energy-constrained applications. The traditional 6T SRAMs exhibit poor cell stability with voltage scaling. To this end, several 8T to 16T cell designs have been reported to improve the stability. However, they either suffer one of disturbances or consume large bit-area overhead. Furthermore, some cell options have a limited write-ability. This paper presents a novel 8T static RAM for reliable subthreshold operation. The cell employs a fully differential scheme and features cross-point access. An adaptive cell bias for each operating mode eliminates the read disturbance and enlarges the write-ability as well as the half-select stability in a cost-effective small bit-area. The bit-cell also can support efficient bit-interleaving. To verify the SRAM technique, a 32-kbit macro incorporating the proposed cell was implemented with an industrial 180 nm low-power CMOS process. At 0.4 V and room temperature, the proposed cell achieves 3.6× better write-ability and 2.6× higher dummy-read stability compared with the commercialized 8T cell. The 32-kbit SRAM successfully operates down to 0.21 V (~0.27 V lower than transistor threshold voltage). At its lowest operating voltage, the sleep-mode leakage power of entire SRAM is 7.75 nW. Many design results indicate that the proposed SRAM design, which is applicable to an aggressively-scaled process, might be quite useful in realizing cost-effective robust ultra-low voltage SRAMs.

Embedded memory options for ultra-low power IoT devices

2019 ◽  
Vol 93 ◽  
pp. 104634
Author(s):  
Khader Mohammad ◽  
Temesghen Tekeste ◽  
Baker Mohammad ◽  
Hani Saleh ◽  
Mahran Qurran
Keyword(s):  
Low Power ◽  
Embedded Memory ◽  
Ultra Low Power ◽  
Iot Devices

scholarly journals Lightweight and Secure Publish-Subscribe System for Cloud-Connected Ultra Low Power IoT Devices

2021 ◽  
Vol 36 (1) ◽  
pp. 110-113
Author(s):  
Norisvaldo Junior ◽  
Anderson Silva ◽  
Adilson Guelfi ◽  
Marcelo Azevedo ◽  
Sergio Kofuji
Keyword(s):  
Low Power ◽  
Ultra Low Power ◽  
Iot Devices
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