scholarly journals Luminescence of insulator layers on silicon excited by electrons

2021 ◽  
Vol 2 (1) ◽  
pp. 9-14
Author(s):  
Alexander P. Baraban ◽  
Valentin A. Dmitriev
Keyword(s):  
Insulator Layers

Surface confinement induces the formation of solid-like insulating ionic liquid nanostructures

2017 ◽  
Author(s):  
Massimiliano Galluzzi ◽  
Simone Bovio ◽  
Paolo Milani ◽  
Alessandro Podestà
Keyword(s):  
Ionic Liquid ◽  
Electrical Properties ◽  
Electric Fields ◽  
Relative Dielectric Constant ◽  
Ionic Mobility ◽  
Electric Properties ◽  
Bulk Liquid ◽  
Structural Reorganization ◽  
Surface Confinement ◽  
Insulator Layers

We report on the modification of the electric properties of the imidazolium-based [BMIM][NTf2] ionic liquid upon surface confinement in the sub-monolayer regime. Solid-like insulating nanostructures of [BMIM][NTf2] spontaneously form on a variety of insulating substrates, at odd with the liquid and conductive nature of the same substances in the bulk phase. A systematic spatially resolved investigation by atomic force microscopy of the morphological, mechanical and electrical properties of [BMIM][NTf2] nanostructures showed that this liquid substance rearranges into lamellar nanostructures with a high degree of vertical order and enhanced resistance to mechanical compressive stresses and very intense electric fields, denoting a solid-like character. The morphological and structural reorganization has a profound impact on the electric properties of supported [BMIM][NTf2] islands, which behave like insulator layers with a relative dielectric constant between 3 and 5, comparable to those of conventional ionic solids, and significantly smaller than those measured in the bulk ionic liquid. These results suggest that in the solid-like ordered domains confined either at surfaces or inside the pores of the nanoporous electrodes of photo-electrochemical devices, the ionic mobility and the overall electrical properties can be significantly perturbed with respect to the bulk liquid phase, which would likely influence the<br>performance of the devices.<br>

Study of Transport Through Low-Temperature GaAs Surface Insulator Layers

1991 ◽  
Vol 241 ◽  
Author(s):  
J. P. Ibbetson ◽  
L.-W. Yin ◽  
M. Hashemi ◽  
A. C. Gossard ◽  
U. K. Mishra
Keyword(s):  
Material Properties ◽  
Surface Effect ◽  
Thin Layers ◽  
Gate Insulator ◽  
High Resistivity ◽  
Growth Surface ◽  
Insulator Layer ◽  
Insulator Layers ◽  
Low Temperature Gaas ◽  
Effective Buffer

ABSTRACTSince epilayers of GaAs grown at low substrate temperature (LTGaAs) and annealed at 600°C were first demonstrated to be an effective buffer layer for eliminating backgating effects, the material properties and electronic characteristics of bulk LTGaAs have been actively investigated. Less attention has been paid to thin layers of LTGaAs (∼2000Å), although these have been shown to improve gate-to-drain breakdown characteristics when incorporated as the surface insulator layer in GaAs MISFET's. In bulk LTGaAs that has been annealed for 10 minutes at 600°C, the formation of arsenic precipitates with a density of 1018 cm-3 has been observed. These are considered to be at least partially responsible for the high resistivity of LTGaAs2. While the exact mechanism of precipitate formation is currently unknown, it would seem reasonable to expect the availability of the growth surface to have a significant effect on any defect redistribution during the anneal. This surface effect would become increasingly apparent as the LTGaAs layer thickness was decreased. It is desirable for MISFET applications that the LTGaAs gate insulator layer be as thin as possible, whilst maintaining high breakdown, in order to maximize device transconductance. To achieve this, it is important to understand how the observed bulk features (such as ∼60Å size arsenic precipitates) are affected in thin LTGaAs layers

Study on Phonon Drag Effect and Phonon Transport in Thin Si-on-Insulator Layers

2015 ◽  
Vol 1117 ◽  
pp. 86-89 ◽  
Author(s):  
Hiroya Ikeda ◽  
Takuro Oda ◽  
Yuhei Suzuki ◽  
Yoshinari Kamakura ◽  
Faiz Salleh
Keyword(s):  
Seebeck Coefficient ◽  
Carrier Concentration ◽  
Phonon Scattering ◽  
Phonon Transport ◽  
Infrared Photodetector ◽  
Phonon Drag ◽  
Drag Effect ◽  
Phonon Modes ◽  
Highly Sensitive ◽  
Insulator Layers

The Seebeck coefficient of P-doped ultrathin Si-on-insulator (SOI) layers is investigated for the application to a highly-sensitive thermopile infrared photodetector. It is found that the Seebeck coefficient originating from the phonon drag is significant in the lightly doped region and depends on the carrier concentration with increasing carrier concentration above ~5×1018 cm-3. On the basis of Seebeck coefficient calculations considering both electron and phonon distribution, the phonon-drag part of SOI Seebeck coefficient is mainly governed by the phonon transport, in which the phonon-phonon scattering process is dominant rather than the crystal boundary scattering even in the SOI layer with a thickness of 10 nm. This fact suggests that the phonon-drag Seebeck coefficient is influenced by the phonon modes different from the thermal conductivity.

Multilayer thin-film based nanophotonic windows: static versus electrotunable design

2021 ◽  
Author(s):  
Ashish Kumar Chowdhary ◽  
Debabrata Sikdar
Keyword(s):  
Solar Radiation ◽  
Energy Demand ◽  
Perfect Match ◽  
Motor Vehicles ◽  
Renewable Energy Resources ◽  
Large Area ◽  
Smart Windows ◽  
Experimental Realization ◽  
Voltage Range ◽  
Insulator Layers

Abstract To meet the global energy demand, rapid growth in fossil fuel consumption has significantly contributed to global warming. Judicious utilization of renewable energy resources could help to combat this global challenge. Here, we present a comparative study on the designs of static and electro-tunable ‘smart’ windows that could help to reduce the energy need of typical airconditioning systems deployed in buildings and motor vehicles. Our design comprises insulator–metal–insulator multi-layered thin-films deposited over a silica glass substrate to filter visible and infrared solar radiation selectively. For static windows, we optimize our design to operate in diverse climatic conditions by choosing different combinations and thicknesses of metal and insulator layers. Whereas for electro-tunable windows, we use an electro–optic polymer as the insulator layers to dynamically control portions of transmitted solar radiation over a voltage range of −12 V to +12 V. Through size-dependence analysis, we could safely assume that the performance of smart windows is less likely to degrade during experimental realization. Our designs are lithography-free, large-area compatible, polarization-independent, angle-insensitive, and robust to fabrication imperfections. The analytical results show a near-perfect match with the simulation findings. The theoretically calculated figure of merit indicates that our proposed smart windows can outperform industry-standard commercial windows.

Infrared analysis of buried insulator layers formed by ion implantation into silicon

1993 ◽  
pp. 312-315
Author(s):  
J. Samitier ◽  
S. Martinez ◽  
A. El Hassani ◽  
A. Pěrez-Rodríguez ◽  
J.R. Morante
Keyword(s):  
Ion Implantation ◽  
Infrared Analysis ◽  
Insulator Layers

Formation and nondestructive characterization of ion implanted silicon‐on‐insulator layers

1987 ◽  
Vol 51 (5) ◽  
pp. 343-345 ◽  
Author(s):  
J. Narayan ◽  
S. Y. Kim ◽  
K. Vedam ◽  
R. Manukonda
Keyword(s):  
Silicon On Insulator ◽  
Insulator Layers ◽  
Nondestructive Characterization ◽  
Ion Implanted

FABRICATION AND ELECTRICAL PROPERTIES OF Au/PVDF-TrFE/LaZrOx/Si(100) STRUCTURE

2010 ◽  
Vol 24 (22) ◽  
pp. 4203-4208 ◽  
Author(s):  
HUI-SEONG HAN ◽  
GWANG-GEUN LEE ◽  
BYUNG-EUN PARK
Keyword(s):  
Thin Films ◽  
Polyvinylidene Fluoride ◽  
Oxide Thickness ◽  
Voltage Sweep ◽  
Window Width ◽  
Capacitance Voltage ◽  
Coating Method ◽  
Insulator Layers ◽  
Lanthanum Zirconium Oxide ◽  
P Type

Metal-ferroelectric-insulator-semiconductor structure capacitors with a polyvinylidene fluoride trifluoroethylene (75/25) (PVDF-TrFE) ferroelectric and a lanthanum zirconium oxide ( LaZrO x) insulator layers were fabricated on a p-type Si(100) substrate in this work. The thin films were prepared using the spin-coating method. The LaZrO x thin films were crystallized at 750°C for 30 min in an O 2 ambient. Negligible hysteresis was observed from the C–V (capacitance-voltage) characteristic of the LaZrO x/ Si structure. The equivalent oxide thickness (EOT) was about 8.2 nm. Then the PVDF-TrFE film was spin-coated on the LaZrO x/ Si structure. To crystallize the PVDF-TrFE, the structure was annealed at 165°C for 30 min. The memory window width in the C–V curve of the Au/PVDF - TrFE/LaZrO x/ Si structure was about 4 V for a voltage sweep of ±5 V, and the leakage current density was about 10-8 A/cm 2 at 35 kV/cm for a 100-nm-thick film.

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