Doherty Power Amplifier with Dynamic Power Dividing Network for Enhanced Efficiency

2014 ◽  
Vol 721 ◽  
pp. 560-563
Author(s):  
Wang Xi ◽  
Yu Shi ◽  
Shao Lin Yang ◽  
Jun Li
Keyword(s):  
Power Amplifier ◽  
High Efficiency ◽  
Field Effect Transistors ◽  
Input Power ◽  
Oxide Semiconductor ◽  
Design System ◽  
Dynamic Power ◽  
Saturated Output Power ◽  
Doherty Power Amplifier ◽  
Enhance Efficiency

In this paper, we present a high efficiency Doherty power amplifier (PA) employing dynamic power dividing network which automatically adjusts the input power division ratio in accordance with the level of input power to enhance efficiency. Doherty PA circuit parameters of each amplifier are determined by basic performance analysis according to the datasheet. Simulated circuits through Advanced Design System (ADS) exhibit an improvement of 4% at a 6 dB backoff point from its saturated output power (PSAT) than that of a conventional Doherty PA. Implemented Doherty PA using two Freescale MRF6S27015N laterally diffused metal oxide semiconductor (LDMOS) field-effect transistors (FETs) achieves excellent drain efficiency of 46.5% at a 6 dB backoff point from PSAT, which is 2% higher than conventional Doherty PA.

scholarly journals A Power Amplifier with Large High-Efficiency Range for 5G Communication

Sensors ◽  
2020 ◽  
Vol 20 (19) ◽  
pp. 5581
Author(s):  
Zhiwei Zhang ◽  
Zhiqun Cheng ◽  
Guohua Liu
Keyword(s):  
Output Power ◽  
Design Process ◽  
Power Amplifier ◽  
High Efficiency ◽  
New Method ◽  
Saturated Output Power ◽  
Doherty Power Amplifier ◽  
5G Communication

This paper presents a new method to design a Doherty power amplifier (DPA) with a large, high-efficiency range for 5G communication. This is through analyzing the drain-to-source capacitance (CDS) of DPAs, and adopting appropriate impedance of the peak device. A closed design process is proposed, to design the extended efficiency range DPA based on derived theories. For validation, a DPA with large efficiency range was designed and fabricated by using two equal devices. The measured results showed that the saturated output power was between 43.4 dBm and 43.7 dBm in the target band. Around 70% saturated drain efficiency is obtained with a gain of greater than 11 dB. Moreover, the obtained drain efficiency is larger than 50% at the 10 dB power back-off, when operating at 3.5 GHz. These superior performances illustrate that the implemented DPA can be applied well in 5G communication.

scholarly journals Design and simulate a doherty power amplifier using GaAs technology for telecommunication applications

2019 ◽  
Vol 15 (2) ◽  
pp. 845
Author(s):  
Ehsan Barmala
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
Power Amplifiers ◽  
High Efficiency ◽  
Maximum Output Power ◽  
Input Power ◽  
Power Divider ◽  
Maximum Efficiency ◽  
Maximum Output ◽  
Doherty Power Amplifier

<span>In this paper, a Doherty power amplifier was designed and simulated at 2.4 GHz central frequency which has high efficiency. A Doherty power amplifier is a way to increase the efficiency in the power amplifiers. OMMIC ED02AH technology and PHEMT transistors, which is made of gallium arsenide, have been used in this simulation. The Doherty power amplifier unique feature is its simple structure which is consisting of two parallel power amplifiers and transmission lines. In order to integrate the circuit, the Doherty power transmission amplifier lines were implemented using an inductor and capacitive components. Also, the Wilkinson power divider is used on the chip input. To improve the efficiency, the auxiliary amplifier dimensions is selected enlarge and the further input power is allocated it by the power divider. A parallel R-C circuit has been used at the input of transistors to improve their stability. Simulation results show that the Doherty power amplifier has 17.2 dB output power gain, 23 dBm maximum output power, and its output power P<sub>1dB</sub> =22.6dBm at compression point -1 dB, also, its maximum efficiency is 55.5%.</span>

High-efficiency three-way Doherty power amplifier using reconfigurable PD

Frequenz ◽  
2021 ◽  
Vol 0 (0) ◽  
Author(s):  
Shiwei Zhao ◽  
Jun Guan ◽  
Xiaoqi Zhou ◽  
Yuehang Xu
Keyword(s):  
Power Amplifier ◽  
Power Distribution ◽  
High Efficiency ◽  
Large Range ◽  
Impedance Matching ◽  
Input Power ◽  
Reverse Voltage ◽  
Power Added Efficiency ◽  
Varactor Diodes ◽  
Doherty Power Amplifier

Abstract In this paper, a new reconfigurable power divider (PD) is proposed to improve the efficiency of the three-way Doherty power amplifier (DPA). The conventional λ/4 transmission line is replaced by the proposed reconfigurable PD in the input of peaking amplifier, where the 90° phase shift and impedance matching can be achieved. Furthermore, the output power distribution ratio (PDR) can be continuously adjusted in a large range by adjusting the reverse voltage of the varactor diodes. Therefore, the reconfigurable PD with the best PDR can assign input power to the peaking amplifier. Experiment results show that the maximum measured power added efficiency (PAE) of the proposed three-way DPA is 49%, which is improved by 5% compared with conventional three-way DPA.

scholarly journals Design of a Wideband Doherty Power Amplifier with High Efficiency for 5G Application

Electronics ◽  
2021 ◽  
Vol 10 (8) ◽  
pp. 873
Author(s):  
Abbas Nasri ◽  
Motahhareh Estebsari ◽  
Siroos Toofan ◽  
Anna Piacibello ◽  
Marco Pirola ◽  
...  
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
High Efficiency ◽  
Matching Network ◽  
Class Ab ◽  
Measurement Results ◽  
Saturated Output Power ◽  
Doherty Power Amplifier ◽  
Good Trade ◽  
The Impact

This paper discusses the design of a wideband class AB-C Doherty power amplifier suitable for 5G applications. Theoretical analysis of the output matching network is presented, focusing on the impact of the non-ideally infinite output impedance of the auxiliary amplifier in back off, due to the device’s parasitic elements. By properly accounting for this effect, the designed output matching network was able to follow the desired impedance trajectories across the 2.8 GHz to 3.6 GHz range (fractional bandwidth = 25%), with a good trade-off between efficiency and bandwidth. The Doherty power amplifier was designed with two 10 W packaged GaN HEMTs. The measurement results showed that it provided 43 dBm to 44.2 dBm saturated output power and 8 dB to 13.5 dB linear power gain over the entire band. The achieved drain efficiency was between 62% and 76.5% at saturation and between 44% and 56% at 6 dB of output power back-off.

1-Package 500W High Efficiency LDMOS Doherty Power Amplifier

2018 ◽  
Author(s):  
Jean-Christophe Nanan ◽  
Yuanyuan Dong ◽  
Sandra De Meyer ◽  
Damien Scatamacchia
Keyword(s):  
Power Amplifier ◽  
High Efficiency ◽  
Doherty Power Amplifier

A broadband 23.1 ∼ 27.2 GHz doherty power amplifier with peak output power of 24.3 dBm

Circuit World ◽  
2019 ◽  
Vol 46 (1) ◽  
pp. 1-5
Author(s):  
Yanfeng Fang ◽  
Yijiang Zhang
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
Input Power ◽  
Content Type ◽  
Fully Integrated ◽  
Power Added Efficiency ◽  
Peak Output Power ◽  
Saturated Output Power ◽  
Direct Input ◽  
Matching Techniques

Purpose This paper aims to implement a new high output power fully integrated 23.1 to 27.2 GHz gallium arsenide heterojunction bipolar transistor power amplifier (PA) to meet the stringent linearity requirements of LTE systems. Design/methodology/approach The direct input power dividing technique is used on the chip. Broadband input and output matching techniques are used for broadband Doherty operation. Findings The PA achieves a small-signal gain of 22.8 dB at 25.1 GHz and a saturated output power of 24.3 dBm at 25.1 GHz with a maximum power added efficiency of 31.7%. The PA occupies 1.56 mm2 (including pads) and consumes a maximum current of 79.91 mA from a 9 V supply. Originality/value In this paper, the author proposed a novel direct input dividing technique with broadband matching circuits using a low Q output matching technique, and demonstrated a fully-integrated Doherty PA across frequencies of 23.1∼27.2 GHz for long term evolution-license auxiliary access (LTE-LAA) handset applications.

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