Research on Designing the Information Management Platform of Physical Education Based on B/S Model

2014 ◽  
Vol 989-994 ◽  
pp. 5481-5485
Author(s):  
Guo Ying Wang
Keyword(s):  
Physical Education ◽  
Information Management ◽  
Central Processor ◽  
Communication Interface ◽  
Information Platform ◽  
Management Platform ◽  
Central Processor Unit ◽  
Framework Model ◽  
Processor Unit ◽  
S Model

This paper, by using multi-layer B/S framework model, combines with VB programming to carry out innovative design of physical education (PE) platform, which has got the B/S framework platform of PE management. PE information management platform mainly comprises the teacher end, the central processor unit (CPU) and the student end, where the communication interface mainly comprises the editor and the computer, and the input of teacher end includes the computer buttons, sensors, and so on. While for the core parts of the system, they are the CPU and the memory demonstrated by PE. Student end through the I/O expansion function analyzes and displays the teaching sound and video signal displayed by using LED or LCD. Finally, the paper designs the data analysis and transfer function of PE information platform, and obtains the curve of information throughput with time changing, which provides a new computer method for the research of PE.

Three-Dimensional Nonlinear Dynamics of Nonintegral Riser Bundle

1991 ◽  
Vol 35 (01) ◽  
pp. 40-57
Author(s):  
Nickolas Vlahopoulos ◽  
Michael M. Bernitsas
Keyword(s):  
Degrees Of Freedom ◽  
Three Dimensional ◽  
Small Strain ◽  
Computer Code ◽  
Three Dimensions ◽  
Central Processor ◽  
Beam Columns ◽  
Central Processor Unit ◽  
Processor Unit ◽  
Strain Model

The dynamic behavior of a nonintegral riser bundle is studied parametrically. The dynamics of each component-riser is analyzed by a three-dimensional, nonlinear, large deflection, small strain model with coupled bending and torsion. Component-risers are slender, thin-walled, extensible or inextensible tubular beam-columns, subject to response and deformation dependent hydrodynamic loads. The con-nector equations of equilibrium are used to derive the connector forces and moments. Substructuring can thus be achieved even though in three dimensions connectors do not impose linearly dependent deflections at substructure interfaces. The developed time incremental and iterative finite-element computer code is used to analyze the effects of water depth, distribution of connectors, distance between component risers and number of finite elements in the numerical model. The problem of total CPU (central processor unit) time and the advantages of substructuring are discussed by running cases of up to 1094 degrees of freedom.

Design of a Temperature-Constrained Governor to Save Energy in an Open Multi-Frequency Green Router

2013 ◽  
Vol 9 (3) ◽  
pp. 16-34
Author(s):  
Alfio Lombardo ◽  
Diego Reforgiato ◽  
Vincenzo Riccobene ◽  
Giovanni Schembra
Keyword(s):  
Energy Saving ◽  
Engine Performance ◽  
Central Processor ◽  
Clock Frequency ◽  
Traffic Loading ◽  
Working Temperature ◽  
Positive Side ◽  
Central Processor Unit ◽  
Save Energy ◽  
Processor Unit

In the last years a new challenge turned out for both researchers and industries in telecommunications area is represented by green networks. Besides energy saving that is possible to achieve, another positive side effect of this is the reduction of the working temperature of internal components of telecommunications devices (switches, home gateway, routers, etc.). This idea is encouraging the development of routers of reduced dimensions as long as there is the knowledge that the temperature remains in a given range. For this reason the target of this paper is to propose a governor policy that provides the best trade-off between quality of service and energy saving in respect of a given target on the working temperature. More specifically, such a governor is in charge to manage the clock frequency of the Central Processor Unit (CPU) of the green router according to the traffic loading the router, varying the processing engine performance, the working temperature and the power consumption of the hardware at the same time. The proposed policy is then applied to a case study and evaluated by simulation to show how it can be used for the above purposes, and to allow green router designers to control the temperature statistics of a router and design the governor parameters to maintain the mean temperature below a given threshold.

A new CUDA-based GPU implementation of the two-dimensional Athena code

2013 ◽  
Vol 61 (1) ◽  
pp. 239-250
Author(s):  
A. Wasiljew ◽  
K. Murawski
Keyword(s):  
Dimensional Space ◽  
Test Cases ◽  
Double Precision ◽  
Central Processor ◽  
Two Dimensional ◽  
Central Processor Unit ◽  
Hardware Configuration ◽  
Cuda Architecture ◽  
Processor Unit ◽  
Gpu Implementation

Abstract We present a new version of the Athena code, which solves magnetohydrodynamic equations in two-dimensional space. This new implementation, which we have named Athena-GPU, uses CUDA architecture to allow the code execution on Graphical Processor Unit (GPU). The Athena-GPU code is an unofficial, modified version of the Athena code which was originally designed for Central Processor Unit (CPU) architecture. We perform numerical tests based on the original Athena-CPU code and its GPU counterpart to make a performance analysis, which includes execution time, precision differences and accuracy. We narrowed our tests and analysis only to double precision floating point operations and two-dimensional test cases. Our comparison shows that results are similar for both two versions of the code, which confirms correctness of our CUDA-based implementation. Our tests reveal that the Athena-GPU code can be 2 to 15-times faster than the Athena-CPU code, depending on test cases, the size of a problem and hardware configuration.

A statistical long-range transport model for simulation of wet sulphate deposition

1989 ◽  
Vol 16 (3) ◽  
pp. 258-266 ◽  
Author(s):  
J. M. Byrne ◽  
E. A. McBean ◽  
K. B. Shipley ◽  
G. J. Farquhar
Keyword(s):  
Long Range ◽  
Transport Model ◽  
Long Range Transport ◽  
Central Processor ◽  
Central Processor Unit ◽  
Range Transport ◽  
Sulphate Deposition ◽  
Time Requirements ◽  
Processor Unit ◽  
Relative Errors

A statistical long-range transport of air pollutants model (UW-LRT) is utilized to simulate wet SO4 deposition in eastern North America in 1980. Model results compare favorably to an analyzed deposition field. In a comparison of the relative errors associated with four long-range transport models, the UW-LRT model demonstrates the lowest variation from recorded, analyzed deposition data. The UW-LRT model has modest data input and central processor unit time requirements. Key words: acid rain, long-range transport, spatial deposition, mathematical models.

Central processor unit operation

2004 ◽  
pp. 42-67
Author(s):  
B. S. Chalk ◽  
A. T. Carter ◽  
R. W. Hind
Keyword(s):  
Central Processor ◽  
Unit Operation ◽  
Central Processor Unit ◽  
Processor Unit

scholarly journals IoT Gas Leakage Detector and Warning Generator

2020 ◽  
Vol 10 (4) ◽  
pp. 6142-6146
Author(s):  
B. F. Alshammari ◽  
M. T. Chughtai
Keyword(s):  
Detection System ◽  
Gas Detection ◽  
The Internet ◽  
Central Processor ◽  
Atmospheric Conditions ◽  
Gas Leakage ◽  
Central Processor Unit ◽  
Industrial Monitoring ◽  
Processor Unit ◽  
The Internet Of Things

This paper presents an industrial monitoring system design using the Internet of Things (IoT). The gas sensor (MQ-5) captured information is posted into a data cloud. The sensor detects the leakage of gas under most atmospheric conditions. All the components are controlled by an Arduino (UNO-1) that acts as a central processor unit in the setup t. As soon as a gas leakage is detected by the sensor, the alarm is raised in the form of a buzzer. This alarm is supported by an LCD to display the location of leakage, alert the observer, and activate the exhaust fan in the particular section to extract leaked gas. The requirement of a gas detection system is not only to monitor continuously the surroundings but also to help prevent the gas leakage hence minimizing the chances of fire and damage.

TERAHERTZ OPTICAL ASYMMETRIC DEMULTIPLEXER BASED ALL OPTICAL DATA COMPARATOR

2010 ◽  
Vol 19 (03) ◽  
pp. 671-682 ◽  
Author(s):  
DILIP KUMAR GAYEN ◽  
CHINMOY TARAPHDAR ◽  
JITENDRA NATH ROY ◽  
RAJAT KUMAR PAL
Keyword(s):  
Binary Data ◽  
Optical Switch ◽  
Full Adder ◽  
Optical Data ◽  
Binary Number ◽  
Central Processor ◽  
Central Processor Unit ◽  
All Optical ◽  
Processor Unit ◽  
Terahertz Optical Asymmetric Demultiplexer

An all-optical data comparator with the help of Terahertz Optical Asymmetric Demultiplexer (TOAD) is proposed. The paper describes the all-optical data comparator by using a set of all-optical full-adder and optical switch. Comparison between two binary data is required in many data processing systems. It is sometimes necessary to know whether a binary number is greater than, equal to, or less than another number. The all-optical data comparator can be used to perform a fast central processor unit using optical hardware components. In this present communication, we have tried to exploit the advantages of TOAD-based switch to design an integrated all-optical circuit which can perform data comparison operations.

scholarly journals APLIKASI PLC SEBAGAI PENGATUR ARAH PUTARAN MOTOR DC UNTUK MENGGERAKAN PMS PADA MINIATUR GARDU INDUK

2015 ◽  
Vol 17 (3) ◽  
Author(s):  
Syarif Aripin ◽  
Moediyono Moediyono
Keyword(s):  
Power Supply ◽  
Dc Motor ◽  
Central Processor ◽  
Motor Speed ◽  
Access Memory ◽  
Rotation Direction ◽  
Central Processor Unit ◽  
Output Module ◽  
Read Only Memory ◽  
Processor Unit

Syarif Aripin, Moediyono, in this paper explain that experiment PLC module is a module that consists of modules and visual experiments. This experimental module consists of PLC (Programmeble Logic Controller) which contained PLC in Central Processor Unit (CPU), memory such as RAM (Radom Access Memory), EPROM (Erasable Programmable Only Memory), EEPROM (Electrical Erasable Programmeble Read Only Memory), input-output module and power supply units (Power supply). PLC is used as props in a series of applications to set the dc motor speed desired by mengguanakan input of the switch. OMRON PLC used is CP1EE with 40 I / O, ie 24 inputs and 16 outputs, PLC is used here as a regulator to enable drivers dc motor is used as a regulator dc motor rotation direction to move pms. In the later rounds measured measurement value is varied. The results of these measurements can be read on the voltmeter and ammeter. Keywords: Driver Motor, DC Motor, Omron PLC CP1E, PMS.

Structural Design of Land Grid Array Loading Mechanisms for Intel Central Processor Unit Stack Retention

2019 ◽  
Vol 141 (1) ◽  
Author(s):  
Phil Geng
Keyword(s):  
Data Center ◽  
Structural Design ◽  
Central Processor ◽  
Element Analysis ◽  
Solder Joint Reliability ◽  
Joint Reliability ◽  
Central Processor Unit ◽  
The Finite Element Analysis ◽  
Processor Unit ◽  
Design Options

For more than a decade, land grid array (LGA) has been one of the main central processor unit (CPU) packages developed at Intel and AMD, and widely used in different computer systems. LGA loading mechanism has become more critical to achieve mechanical, thermal, and electrical functions with the increasing retention force requirement. During the development of the loading mechanisms for LGA packages and sockets, socket pin contact to LGA pad under retention load, solder joint reliability under shock load, socket pin fretting under vibration, and load degradation are some of the key structural risks. This paper reviews the structural designs of different loading mechanism solutions systematically and summarizes the key structural concerns and advantages. While the finite element analysis (FEA) was used to guide the design options in early platform architectural definition, this review discusses the evolution of Xeon LGA loading mechanisms developed at the Intel Data Center Group.

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