Characterization of the SiO2/SiC Interface with Impedance Spectroscopy

2009 ◽  
Vol 615-617 ◽  
pp. 501-504 ◽  
Author(s):  
Pawel A. Sobas ◽  
Ulrike Grossner ◽  
Bengt Gunnar Svensson
Keyword(s):  
Impedance Spectroscopy ◽  
Ionic Conduction ◽  
Semiconductor Interface ◽  
Transfer Processes ◽  
Capacitance Voltage ◽  
Dc Bias ◽  
The One ◽  
Cv Measurements ◽  
Mos Structures

Using impedance spectroscopy (IS) for the characterization of SiO2/4H-SiC (MOS) structures, insight on the capacitive and resistive contributions in different physical regions of the MOS structures is obtained. Changing the DC bias conditions, semiconductor, interface as well as oxide traps can be detected. The MOS capacitance, as extracted from IS data, is different from the one obtained using capacitance voltage (CV) measurements, due to the possibility of distinguishing different charge transfer processes using IS. For instance, in the investigated capacitors, a clear contribution is revealed from ionic conduction processes at bias voltages close to zero.

Nanoprobe Characterization of Soft SRAM bit Fails in Advanced Technologies

2019 ◽  
Author(s):  
Satish Kodali ◽  
Chen Zhe ◽  
Chong Khiam Oh
Keyword(s):  
Yield Loss ◽  
Performance Metrics ◽  
Root Cause ◽  
Advanced Technologies ◽  
Capacitance Voltage ◽  
Defect Localization ◽  
Cv Measurements ◽  
Lightly Doped Drain ◽  
Dc Characterization

Abstract Nanoprobing is one of the key characterization techniques for soft defect localization in SRAM. DC transistor performance metrics could be used to identify the root cause of the fail mode. One such case report where nanoprobing was applied to a wafer impacted by significant SRAM yield loss is presented in this paper where standard FIB cross-section on hard fail sites and top down delayered inspection did not reveal any obvious defects. The authors performed nanoprobing DC characterization measurements followed by capacitance-voltage (CV) measurements. Two probe CV measurement was then performed between the gate and drain of the device with source and bulk floating. The authors identified valuable process marginality at the gate to lightly doped drain overlap region. Physical characterization on an inline split wafer identified residual deposits on the BL contacts potentially blocking the implant. Enhanced cleans for resist removal was implemented as a fix for the fail mode.

Radiation Hardness for Silicon Oxide and Aluminum Oxide on 4H-SiC

2018 ◽  
Vol 924 ◽  
pp. 229-232 ◽  
Author(s):  
Anders Hallén ◽  
Sethu Saveda Suvanam
Keyword(s):  
Proton Irradiation ◽  
Silicon Oxide ◽  
Positive Charge ◽  
Gate Dielectric ◽  
Radiation Hardness ◽  
Flat Band ◽  
Capacitance Voltage ◽  
Cv Measurements ◽  
Radiation Hard ◽  
Mos Structures

The radiation hardness of two dielectrics, SiO2and Al2O3, deposited on low doped, n-type 4H-SiC epitaxial layers has been investigated by exposing MOS structures involving these materials to MeV proton irradiation. The samples are examined by capacitance voltage (CV) measurements and, from the flat band voltage shift, it is concluded that positive charge is induced in the exposed structures detectable for fluence above 1×1011cm-2. The positive charge increases with proton fluence, but the SiO2/4H-SiC structures are slightly more sensitive, showing that Al2O3can provide a more radiation hard passivation, or gate dielectric for 4H-SiC devices.

Electrical Characterization of Al2O3 - SiO2 Mos Structures

1999 ◽  
Vol 567 ◽  
Author(s):  
L-Å Ragnarsson ◽  
E. Aderstedt ◽  
P. Lundgren
Keyword(s):  
Electrical Characterization ◽  
Thickness Reduction ◽  
Initial Thickness ◽  
Equivalent Thickness ◽  
Conventional Furnace ◽  
Capacitance Voltage ◽  
Layered Dielectric ◽  
The Impact ◽  
Mos Structures

ABSTRACTA comparative capacitance voltage method is used to investigate the equivalent thickness reduction during post metallization annealing of thermally grown ultrathin (∼15-27 Å) oxides. It is found that a double layered dielectric consisting of a thin Al2O3—SiO2 sandwich is appropriate to describe both the increased capacitance and the nearly unaltered current after anneal. It is further shown that the impact of initial thickness and method of growth — in a conventional furnace or by rapid thermal oxidation — on the equivalent thickness reduction is negligible.

Characterization of SiC MOS Structures using Conductance Spectroscopy and Capacitance Voltage Analysis

2000 ◽  
Vol 338-342 ◽  
pp. 1117-1120 ◽  
Author(s):  
Einar Ö. Sveinbjörnsson ◽  
M. Ahnoff ◽  
H.Ö. Ólafsson
Keyword(s):  
Capacitance Voltage ◽  
Mos Structures

Metal-Ferroelectric-Semiconductor Characteristics of BaMgF4 Films on p-Silicon

1991 ◽  
Vol 230 ◽  
Author(s):  
T. S. Kalkur ◽  
J. R. Kulkarni ◽  
R. Y. Kwor ◽  
L. Levinson ◽  
L. Kammerdiner
Keyword(s):  
Threshold Voltage ◽  
Zirconium Oxide ◽  
Ionic Conduction ◽  
Electrical Characterization ◽  
Temperature Dependent ◽  
Capping Layer ◽  
Capacitance Voltage ◽  
Ferroelectric Memories ◽  
Non Destructive

AbstractCapacitance-voltage characterstics of BaMgF4 film deposited in an ion-assisted deposition system shows hysteresis and the direction of hysteresis corresponds to ferroelectric polarization. Electrical characterization of the films shows that these films can be used to implement non-destructive read-out non-volatile ferroelectric memories. These films were found to dissolve in water and other aqueous solutions. In order to overcome this problem, a suitable capping layer like zirconium oxide and amorphous silicon was deposited on BMF films. The shift in threshold voltage did not change significantly due to the incorporation of the capping layer. The shift in threshold voltage was found to be temperature dependent and this might be due to ionic conduction in fluorides.

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