Threshold Voltage Instability of SiC-MOSFETs on Various Crystal Faces

2014 ◽  
Vol 778-780 ◽  
pp. 521-524 ◽  
Author(s):  
Junji Senzaki ◽  
Atsushi Shimozato ◽  
Kazutoshi Kojima ◽  
Shinsuke Harada ◽  
Keiko Ariyoshi ◽  
...  
Keyword(s):  
Temperature Stress ◽  
Threshold Voltage ◽  
Gate Oxide ◽  
The Other ◽  
Crystal Face ◽  
Forming Process ◽  
Voltage Instability ◽  
Other Hand ◽  
Bias Temperature Stress

Threshold voltage (VTH) of SiC-MOSFETs on various crystal faces has been investigated systematically using the same bias-temperature-stress (BTS) conditions. In addition, dependences of gate-oxide-forming process on VTH instability is also discussed. Nitridation treatments such as N2O and NH3 post-oxidation annealing (POA) are effective in stabilization of VTH under both positive-and negative-BTS tests regardless of crystal face. On the other hand, serious VTH instability was confirmed in MOSFETs with gate oxide by pyrogenic oxidation followed by H2 POA.

Impact of Al Doping Concentration at Channel Region on Mobility and Threshold Voltage Instability in 4H-SiC Trench N-MOSFETs

2016 ◽  
Vol 858 ◽  
pp. 607-610 ◽  
Author(s):  
Katsuhiro Kutsuki ◽  
Sachiko Kawaji ◽  
Yukihiko Watanabe ◽  
Masatoshi Tsujimura ◽  
Toru Onishi ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
Doping Concentration ◽  
The Other ◽  
Positive Bias ◽  
Al Doping ◽  
Channel Mobility ◽  
Voltage Instability ◽  
Bias Temperature Stress ◽  
Channel Region ◽  
Effective Channel

The effect of Al doping concentration (NA) at channel regions ranging from 1.0×1017 to 4.0×1017 cm-3 on the effective channel mobility of electron (μeff) and the threshold voltage (Vth) instability under the positive bias-temperature-stress conditions has been investigated througu the use of trench-gate 4H-SiC MOSFETs with m-face (1-100) channel regions. It was found that μeff degraded with an increase in NA. On the other hand, the increase of NA enlarged the Vth instability. These results indicate that NA has a large impact not only on the Vth value but also on the channel resistance and reliability in 4H-SiC trench MOSFETs.

1700V, 5.5mOhm-cm2 4H-SiC DMOSFET with Stable 225°C Operation

2014 ◽  
Vol 778-780 ◽  
pp. 903-906 ◽  
Author(s):  
Kevin Matocha ◽  
Kiran Chatty ◽  
Sujit Banerjee ◽  
Larry B. Rowland
Keyword(s):  
High Temperature ◽  
Temperature Stress ◽  
High Temperatures ◽  
Threshold Voltage ◽  
Room Temperature ◽  
Gate Bias ◽  
Threshold Voltage Shift ◽  
Device Reliability ◽  
Bias Temperature Stress ◽  
High Temperature Operation

We report a 1700V, 5.5mΩ-cm24H-SiC DMOSFET capable of 225°C operation. The specific on-resistance of the DMOSFET designed for 1200V applications is 8.8mΩ-cm2at 225°C, an increase of only 60% compared to the room temperature value. The low specific on-resistance at high temperatures enables a smaller die size for high temperature operation. Under a negative gate bias temperature stress (BTS) at VGS=-15 V at 225°C for 20 minutes, the devices show a threshold voltage shift of ΔVTH=-0.25 V demonstrating one of the key device reliability requirements for high temperature operation.

Effect of the Blank-Holding Load on the Drawing Force in the Deep-Drawing Process of Cylindrical and Square Cups

2015 ◽  
Vol 760 ◽  
pp. 379-384 ◽  
Author(s):  
Lucian Lazarescu ◽  
Ioan Nicodim ◽  
Dan Sorin Comsa ◽  
Dorel Banabic
Keyword(s):  
Aluminum Alloy ◽  
Deep Drawing ◽  
The Other ◽  
Drawing Process ◽  
Drawing Force ◽  
Forming Process ◽  
Deep Drawing Process ◽  
Steel Sheets ◽  
Other Hand ◽  
Blank Holding Force

In this study, the influence of the blank-holding force (BHF) on the drawing force (DF) in the deep-drawing process of cylindrical and square cups has been investigated experimentally. For this purpose, different constant and variable BHFs have been applied to AA6016-T4 aluminum alloy and DC04 steel sheets during the forming process. It has been observed that an increased constant BHF leads to an increase of DF. On the other hand, the variable BHF approach, in which the BHF decreases in six steps throughout the punch stroke, reduces the DF.

Improvement of Gate Oxide Integrity Characteristics in CZ-Grown Si Crystals by H2 annealing

1992 ◽  
Vol 262 ◽  
Author(s):  
N. Adachi ◽  
H. Nishikawa ◽  
Y. Komatsu ◽  
H. Hourai ◽  
M. Sano ◽  
...  
Keyword(s):  
Thermal Decomposition ◽  
Gate Oxide ◽  
Reduction Reaction ◽  
Silicon Wafers ◽  
The Other ◽  
Inert Gases ◽  
Dominant Mechanism ◽  
Other Hand ◽  
Oxygen Precipitates ◽  
Gate Oxide Integrity

ABSTRACTThe mechanism of improvement in gate oxide integrity (GOI) characteristics by H2 annealing in CZ-grown Silicon wafers was investigated. Grown-in defects that are considered to degrade GOI and which can be detected correlatively as 0.1 μm level size pits appearing after SC-1 cleaning, decrease drastically by H2 annealing, while other inert gases, i.e., N2 and Ar, do not exhibit such effect. Besides, H2 annealing shrinks or extinguishes oxygen precipitates significantly, while other gases do not. On the other hand, oxygen outdiffusion is exactly the same among H2, N2 and Ar annealing. From these results, it was concluded that the dominant mechanism for GOI characteristics improvement by H2 annealing is due to decomposition of the grown-in defects having Si-O bonding by the reduction reaction between Si-O bonding and hydrogen, and not due to a mere thermal decomposition enhanced by oxygen outdiffusion.

Effects of Pre-Gate Oxidation Cleaning and Gettering Upon The Very Thin Oxide Integrity

1986 ◽  
Vol 71 ◽  
Author(s):  
J. Lee ◽  
C. Y. Tung ◽  
S. Hahn ◽  
P. Chiao
Keyword(s):  
Carrier Lifetime ◽  
Minority Carrier ◽  
Minority Carrier Lifetime ◽  
Gate Oxide ◽  
The Other ◽  
Time Dependent ◽  
Cleaning Process ◽  
Oxygen Precipitation ◽  
Other Hand ◽  
Thin Gate Oxide

AbstractVarious pre-gate oxide cleaning and gettering techniques on the integrity of thin gate oxide were investigated. A 100 Å thick oxide capacitor was used to study its time-dependent breakdown characteristics and minority carrier lifetime. It has been shown that the oxide integrity as measured by time-dependent breakdown and the minority carrier lifetime are very sensitive to the cleaning technique. On the other hand, given adequate cleaning process, different intrinsic gettering schemes may only influence the oxygen precipitation, as well as the minority carrier lifetime, but not the oxide integrity.

Observing two stage recovery of gate oxide damage created under negative bias temperature stress

2010 ◽  
Vol 107 (2) ◽  
pp. 024508 ◽  
Author(s):  
Thomas Aichinger ◽  
Michael Nelhiebel ◽  
Sascha Einspieler ◽  
Tibor Grasser
Keyword(s):  
Temperature Stress ◽  
Gate Oxide ◽  
Negative Bias ◽  
Two Stage ◽  
Bias Temperature Stress ◽  
Oxide Damage

Threshold Voltage Instability in 4H-SiC MOSFETs with Nitrided Gate Oxide Revealed by Non-relaxation Method

2015 ◽  
Author(s):  
M. Sometani ◽  
D. Okamoto ◽  
S. Harada ◽  
H. Ishimori ◽  
S. Takasu ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
Relaxation Method ◽  
Gate Oxide ◽  
Voltage Instability
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