Study on NO Passivation on the Near Interface Electron and Hole Traps of n-Type 4H-SiC MOS Capacitors by Ultraviolet Light

2018 ◽  
Vol 924 ◽  
pp. 449-452 ◽  
Author(s):  
Yi Fan Jia ◽  
Hong Liang Lv ◽  
Xiao Yan Tang ◽  
Qing Wen Song ◽  
Yi Men Zhang ◽  
...  
Keyword(s):  
Nitric Oxide ◽  
Ultraviolet Light ◽  
Annealed Sample ◽  
Flat Band ◽  
Flat Band Voltage ◽  
Mos Capacitors ◽  
Bias Stress ◽  
Mos Devices ◽  
Capacitance Voltage ◽  
Electron And Hole Traps

The characteristics of near interface electron and hole traps in n-type 4H-SiC MOS capacitors with and without nitric oxide (NO) passivation have been systematically investigated. The hysteresis of the bidirectional capacitance-voltage (C-V) and the shift of flat band voltage (Vfb) caused by bias stress (BS) with and without ultraviolet light (UVL) irradiation are used for studying the influence of near interface electron traps (NIETs) and near interface hole traps (NIHTs). Compared with Ar annealed process, NO passivation can effectively reduce the density of NIETs, but induce excess NIHTs in the SiC MOS devices. What’s worse is that part of the trapped hole cannot be released easily from the NIHTs in the NO annealed sample, which may act as the positive fixed charge and induce the negative shift of threshold voltage.

A Comparison of Mos Devices with In-Situ Boron Doped Polysilicon and Poly Sige Gates Deposited in an Rtcvd System Using S12H6 and B2H6 Gas Mixture

1998 ◽  
Vol 525 ◽  
Author(s):  
M. R. Mirabedini ◽  
V. Z-Q Li ◽  
A. R. Acker ◽  
R. T. Kuehn ◽  
D. Venables ◽  
...  
Keyword(s):  
Flat Band ◽  
Gas Mixture ◽  
Mos Capacitors ◽  
Mos Devices ◽  
Boron Doped ◽  
Depletion Effect ◽  
Polysilicon Films ◽  
Sims Analysis ◽  
Boron Penetration

ABSTRACTIn this work, in-situ doped polysilicon and poly-SiGe films have been used as the gate material for the fabrication of MOS devices to evaluate their respective performances. These films were deposited in an RTCVD system using a Si2H6 and GeH4 gas mixture. MOS capacitors with 45 Å thick gate oxides and polysilicon/poly-SiGe gates were subjected to different anneals to study boron penetration. SIMS analysis and flat band voltage measurements showed much lower boron penetration for devices with poly-SiGe gates than for devices with polysilicon gates. In addition, C-V measurements showed no poly depletion effects for poly-SiGe gates while polysilicon gates had a depletion effect of about 8%. A comparison of resistivities of these films showed a low resistivity of 1 mΩ-cm for poly-SiGe films versus 3 mΩ-cm for polysilicon films after an anneal at 950 °C for 30 seconds.

The Effect of Charge Redistribution on Flat-Band Voltage Turnaround in 4H-SiC MOS Capacitors

2017 ◽  
Vol 897 ◽  
pp. 167-170
Author(s):  
Hamid Amini Moghadam ◽  
Sima Dimitrijev ◽  
Ji Sheng Han ◽  
Daniel Haasmann
Keyword(s):  
Room Temperature ◽  
Flat Band ◽  
Gate Bias ◽  
Charge Redistribution ◽  
Flat Band Voltage ◽  
Transitional Layer ◽  
Mos Capacitors ◽  
Voltage Instability ◽  
Polar Species ◽  
Different Temperatures

The existence of a turnaround in flat-band voltage shift of stressed MOS capacitors, fabricated on N-type 4H–SiC substrates, is reported in this paper. The turnaround is observed by room-temperature C–V measurements, after two minutes gate-bias stressing of the MOS capacitors at different temperatures. The existence of this turnaround effect demonstrates that a mechanism, in addition to the well-stablished tunneling to the near-interface oxide traps, is involved in the threshold voltage instability of 4H–SiC MOSFETs. This newly identified mechanism occurs due to charge redistribution of the compound polar species that exist in the SiO2–SiC transitional layer.

Influences of Plasma Processed Interface Layers on Germanium MOS Devices with ALD Grown HfO2

2007 ◽  
Vol 996 ◽  
Author(s):  
Takuya Sugawara ◽  
Raghavasimhan Sreenivasan ◽  
Yasuhiro Oshima ◽  
Paul C. McIntyre
Keyword(s):  
Electrical Properties ◽  
Interface Layer ◽  
Hafnium Dioxide ◽  
Passivation Layer ◽  
Oxide Semiconductor ◽  
Flat Band ◽  
Mos Capacitors ◽  
Mos Devices ◽  
Interface Layers ◽  
Silicon Based

AbstractGermanium and hafnium-dioxide (HfO2) stack structures' physical and electrical properties were studied based on the comparison of germanium and silicon based metal-oxide-semiconductor (MOS) capacitors' electrical properties. In germanium MOS capacitor with oxide/oxynitride interface layer, larger negative flat-band-voltage (Vfb) shift compared with silicon based MOS capacitors was observed. Secondary ion mass spectrum (SIMS) characteristics of HfO2-germanium stack structure with germanium oxynitride (GeON) interfacial layer showed germanium out diffusion into HfO2. These results indicate that the germanium out diffusion into HfO2 would be the origin of the germanium originated negative Vfb shift. Using Ta3N5 layer as a germanium passivation layer, reduced Vfb shift and negligible hysteresis were observed. These results suggest that the selection of passivation layer strongly influences the electrical properties of germanium based MOS devices.

Radiation Damage of SiO2/Si By Energetic Neutral Beam and Vjuv Photons

1988 ◽  
Vol 128 ◽  
Author(s):  
Tatsumi Mizutani ◽  
Shigeru Nishimatsu ◽  
Takashi Yunogami
Keyword(s):  
Kinetic Energy ◽  
Radiation Damage ◽  
Vacuum Ultraviolet ◽  
Ion Beam ◽  
Generation Mechanism ◽  
Neutral Beam ◽  
Flat Band ◽  
Flat Band Voltage ◽  
Capacitance Voltage

ABSTRACTTo clarify the generation mechanism of radiation damage induced in SiO2/Si by plasma processes, effects of three different beams, i.e., ions, neutrals and vacuum ultraviolet (VUV) photons have been evaluated independently. The radiation damage caused by these energetic bombardments has been measured by capacitance-voltage (C-V) measurements. These reveal that bombardments with a 250 eV Neo neutral beam generate + far less flat-band voltage shifts ( ΔVFB) than those with a Ne+ ion beam of equal kinetic energy. This c n be interpreted in terms of the differences in charge build-up and in hole production upon the incidence of these particles. VUV photons produced in the plasma are also responsible for large ΔVFB.

scholarly journals Effects of Electrical Stress in Solution-Processed Spin-On Glass Dielectric Films: Frequency Dependence

2021 ◽  
Vol 4 (1) ◽  
pp. 2
Author(s):  
Ovier Obregon ◽  
Salvador Alcantara ◽  
Susana Soto ◽  
Miguel A. Dominguez
Keyword(s):  
Frequency Dependence ◽  
Ambient Air ◽  
Oxide Semiconductor ◽  
Dielectric Films ◽  
Mos Capacitors ◽  
Bias Stress ◽  
Electrical Stress ◽  
Interface Charge ◽  
Transparent Dielectric ◽  
Capacitance Voltage

In this work, the effects of the frequency dependence of transparent dielectric based on Spin-on Glass (SOG) under electrical stress is presented. The SOG thin films were cured at 200 °C in ambient air. The capacitance-voltage and capacitance-frequency characteristics were measured in Metal-Oxide-Semiconductor (MOS) capacitors using the SOG thin film. In addition, electrical stress is applied to the MOS capacitors at different voltage values and during a long period of time. The results show, depending on the bias stress applied, a reversible interface charge contribution and an irreversible charge induced by interface states probably generated by the degradation of the film.

Characterization of Electronic Charged States of Silicon Nanocrystals as a Floating Gate in MOS Structures

2004 ◽  
Vol 830 ◽  
Author(s):  
Seiichi Miyazaki ◽  
Taku Shibaguchi ◽  
Mitsuhisa Ikeda
Keyword(s):  
Visible Light ◽  
Energy State ◽  
Floating Gate ◽  
Flat Band ◽  
Displacement Current ◽  
Light Illumination ◽  
Flat Band Voltage ◽  
Mos Capacitors ◽  
Symmetric Pattern ◽  
Visible Light Illumination

ABSTRACTWe have studied capacitance-voltage (C-V) and displacement current-voltage characteristics of MOS capacitors with Si nanocrystals embedded in the gate oxide as a floating gate in dark and under visible light illumination at room temperature to gain a better understanding of discrete charged states of the Si-dots floating gate. The Si-dots floating gate with a dot density of 2.8×1011cm-2 and an average dot size of 8nm was fabricated on ∼2.8nm-thick thermally-grown SiO2 as a tunnel oxide by the thermal decomposition of SiH4, and covered with 7.5nm-thick control oxide prepared by thermal oxidation of a-Si. C-V characteristics of Al-gate MOS capacitors on p-type and n-type Si(100) show unique hystereses due to the charging and discharging of the Si-dots floating gate with a symmetric pattern reflecting the Fermi level of the substrate, which enable us to rule out the contribution of traps with a specific energy state to the observed hystereses. For each of high-frequency C-V curves measured in dark, a single capacitance peak appears only around a flat-band voltage condition, which is attributed to the quick flat-band voltage shift caused by the collective emission of charges retaining in the Si-dots floating gate as confirmed from the corresponding displacement current peak. Under visible light illumination, another capacitance peak due to collective charge injection to the electrically neutral Si-dots floating gate becomes observable in the inversion condition governing the on-state of MOS FETs. Thus, the optimum bias conditions for dot-floating gate MOSFETs can be predicted from the capacitor characteristics measured under light illumination.

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