scholarly journals Multiwalled carbon nanotubes synthesis from methane using a stainless steel foils as a catalyst

2020 ◽  
Vol 9 (3) ◽  
pp. 27-30
Author(s):  
Thuan Huynh Minh ◽  
Sura Nguyen ◽  
Ngan Nguyen Thi Kim ◽  
Huan Nguyen Manh ◽  
Uy Do Pham Noa ◽  
...  

In this study, a thin stainless-steel foil was used as a catalyst for carbon nanotubes (CNTs) using methane as a carbon source via the chemical vapor deposition (CVD) method. Our results revealed that pre-treatment step of the catalyst plays an important role in CNT formation. In our experiments, a catalyst pre-treatment temperature of 850 oC have been found to facilitate the surface roughness and provide more active nucleation sites for CNTs formation. Multiwalled CNTs with 6 layers, their diameters of 10 – 20 nm and their length of app. 300 nm were grown. This finding might lead to a process for improving the quality of MWCNTs grown on steel foil as catalyst.

2021 ◽  
Vol 10 (1) ◽  
pp. 54-58
Author(s):  
Thuan Huynh Minh ◽  
Sura Nguyen ◽  
Ngan Nguyen Thi Kim ◽  
Huan Nguyen Manh ◽  
Noa Uy Do Pham ◽  
...  

In this study, a thin stainless-steel foil was used as a catalyst for carbon nanotubes (CNTs) using methane as a carbon source via the chemical vapor deposition (CVD) method. Our results revealed that pre-treatment step of the catalyst plays an important role in CNT formation. In our experiments, a catalyst pre-treatment temperature of 850 oC have been found to facilitate the surface roughness and provide more active nucleation sites for CNTs formation. Multiwalled CNTs with 6 layers, their diameters of 10 – 20 nm and their length of app. 300 nm were grown. This finding might lead to a process for improving the quality of MWCNTs grown on steel foil as catalyst.


2006 ◽  
Vol 910 ◽  
Author(s):  
Alex Z Kattamis ◽  
I-Chun Cheng ◽  
Yongtaek Hong ◽  
Sigurd Wagner

AbstractWe have fabricated pixel circuits consisting of two bottom-gate staggered source-drain amorphous silicon thin-film transistors (a-Si:H TFTs) on flexible stainless steel foils. Stainless steel is attractive because it allows for high processing temperatures of >300°C and is a perfect barrier to oxygen and moisture. Our steel foils were 75m thick, with a peak-to-peak surface roughness of >1.2m. This rough, as-rolled, conductive surface needed a thick planarization and passivation (electrical isolation) layer. The surface was planarized with 1.6m of spin-on-glass, which reduced the roughness to ~0.3m peak-to-peak. A passivation layer of 0.6m of SiNx deposited by plasma-enhanced chemical vapor deposition was used to reduce leakage currents and capacitive coupling to the substrate. The 92m × 369m voltage-programmed pixel circuits employ a switching (Sw) TFT (W/L=50/5m), a driver (Dr) TFT (W/L=200/5m), and a 2pF storage capacitor between the gate and source of the Dr TFT. With a supply voltage of VDD=20V and a drive bias of 20V the circuits deliver 26A of current. The vertical stripe pixels were integrated into 48 × (4) × 48 arrays and passivated with SiNx. Anode metal of Al-1% Si was also deposited, preparing the displays for subsequent OLED fabrication. Pixel circuits with this performance can drive top-emitting organic light emitting diodes (OLEDs) and therefore can be used in backplanes for flexible, high-resolution, active-matrix OLED displays.


Metals ◽  
2020 ◽  
Vol 11 (1) ◽  
pp. 38
Author(s):  
Matthias Weiss ◽  
Peng Zhang ◽  
Michael P. Pereira ◽  
Bernard F. Rolfe ◽  
Daniel E. Wilkosz ◽  
...  

This study investigates the effect of grain size and composition on the material properties and forming limits of commercially supplied stainless steel foil for bipolar plate manufacture via tensile, stretch forming and micro-stamping trials. It is shown that in commercially supplied stainless steel the grain size can vary significantly and that ‘size effects’ can be influenced by prior steel processing and composition effects. While the forming limits in micro-stamping appear to be directly linked to the plane strain forming limits of the individual stainless steel alloys, there was a clear effect of the tensile anisotropy. In contrast to previous studies, forming severity and the likelihood of material failure did not increase with a decreasing channel profile radius. This was related to inaccuracies of the forming tool profile shape.


1996 ◽  
Vol 424 ◽  
Author(s):  
S. D. Theiss ◽  
S. Wagner

AbstractWe describe the successful fabrication of device-quality a-Si:H thin-film transistors (TFTs) on stainless-steel foil substrates. These TFTs demonstrate that transistor circuits can be made on a flexible, non-breakable substrate. Such circuits could be used in reflective or emissive displays, and in other applications that require rugged macroelectronic circuits.Two inverted TFT structures have been made, using 200 gim thick stainless steel foils with polished surfaces. In the first structure we used the substrate as the gate and utilized a homemade mask set with very large feature sizes: L = 45 μm; W = 2.5 mm. The second, inverted staggered, structure used a 9500 Å a-SiNx:H passivating/insulating layer deposited on the steel to enable the use of isolated gates. For this structure we used a mask set which is composed of TFTs with much smaller feature sizes. Both TFT structures exhibit transistor action. Current-voltage characterization of the TFTs with the inverted staggered structure shows typical on/off current ratios of 107, leakage currents on the order of 10-12 A, good linear and saturation current behavior, and channel mobilities of 0.5 cm2/V·sec. These characteristics clearly identify the TFTs grown on stainless steel foil as being of device quality.


2013 ◽  
Vol 113 (5) ◽  
pp. 054506 ◽  
Author(s):  
P. Blösch ◽  
F. Pianezzi ◽  
A. Chirilă ◽  
P. Rossbach ◽  
S. Nishiwaki ◽  
...  

2018 ◽  
Vol 165 (16) ◽  
pp. A3684-A3696 ◽  
Author(s):  
Willian G. Nunes ◽  
Rafael Vicentini ◽  
Leonardo M. Da Silva ◽  
Lenon H. Costa ◽  
Thais Tadeu ◽  
...  

2002 ◽  
Vol 106 (22) ◽  
pp. 5629-5635 ◽  
Author(s):  
Lance Delzeit ◽  
Cattien V. Nguyen ◽  
Bin Chen ◽  
Ramsey Stevens ◽  
Alan Cassell ◽  
...  

2013 ◽  
Vol 834-836 ◽  
pp. 33-36
Author(s):  
Lang Wang ◽  
Jian Hua Zhang ◽  
Lian Qiao Yang

In this paper, the process parameters of graphene during fabrication and transfer are investigated. Cu is utilized as the substrate and chemical vapor deposition are used to obtain graphene. The results show that, the surface condition of the Cu substrate tends to be worse than as-received after a relatively higher temperature (1035°C) annealing and growth process, which lead to bad graphene quality. In addition, pre-treatment of Cu substrate by acetic acid is helpful to reduce the nucleation sites. Reflow process before PMMA etching is an effective method to eliminate the wrinkles formed during transfer. High-quality graphene for optoelectronic applications were obtained based on the optimized fabrication and transfer process.


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