Development of a new distributed hybrid seismic and electrical data acquisition station based on system-on-a-programmable-chip technology

Abstract. In the past few decades, with the continuous advancement of technology, seismic and electrical instruments have developed rapidly. However, complex and harsh exploration environments led to higher requirements and severe challenges for traditional geophysical exploration methods and instruments. Therefore, it is extremely urgent to develop new high-precision exploration instruments and data acquisition systems. In this study, a new distributed seismic and electrical hybrid acquisition station is developed using system-on-a-programmable-chip (SoPC) technology. The acquisition station hardware includes an analog board and a main control board. The analog board uses a signal conditioning circuit and a 24-bit analog-to-digital converter (ADS1271) to achieve high-precision data acquisition, while the main control board uses a low-power SoPC to enable high-speed stable data transmission. We designed the data transmission protocol for the acquisition station and developed independently an improved low-voltage differential signaling data transmission technology. What's more, a method to enhance the precision of synchronous acquisition was studied in depth. These key technologies, which were developed for the acquisition station, were integrated into the SoPC of the main control board. Test results indicate that the synchronization precision of the acquisition station is better than 200 ns, and the maximum low-power data transmission speed is 16 Mbps along a 55 m cable. The developed acquisition station has the advantages of low noise, large dynamic range, low power consumption, etc., and it can achieve high-precision hybrid acquisition of seismic and electrical data.

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Development of a new distributed hybrid seismic-electrical data acquisition station based on system–on-a-programmable-chip technology

10.5194/gi-2019-12 ◽

2019 ◽

Author(s):

Qisheng Zhang ◽

Wenhao Li ◽

Feng Guo ◽

Zhenzhong Yuan ◽

Shuaiqing Qiao ◽

...

Keyword(s):

Low Power ◽

Data Acquisition ◽

High Precision ◽

Data Transmission ◽

Dynamic Range ◽

Low Voltage ◽

Low Noise ◽

Transmission Protocol ◽

Control Board ◽

Electrical Data

Abstract. In the past few decades, with the continuous advancement of technology, seismic-electrical instruments have developed rapidly. However, complex and harsh exploration environments have put forward higher requirements and severe challenges for traditional geophysical exploration methods and instruments. Therefore, it is extremely urgent to develop new high-precision exploration instruments and data acquisition systems. In this study, a new distributed seismic-electrical hybrid acquisition station is developed using system-on-a-programmable-chip (SoPC) technology. The acquisition station hardware includes an analog board and a main control board. The analog board uses a signal conditioning circuit and a 24-bit analog-to-digital converter (ADS1271) to achieve high-precision data acquisition, while the main control board uses a low-power SoPC chip to enable high-speed stable data transmission. Moreover, the data transmission protocol for the acquisition station was designed, an improved low-voltage differential signaling data transmission technology was independently developed, and a method to enhance the precision of synchronous acquisition was studied in depth. These key technologies, which were developed for the acquisition station, were integrated into the SoPC of the main control board. Testing results indicate that the synchronization precision of the acquisition station is better than 200 ns, and the maximum low-power data transmission speed is 16 Mbps along a 55 m cable. Simultaneously, the developed acquisition station has the advantages of low noise, large dynamic range, low power consumption, etc., and it can achieve high-precision hybrid acquisition of seismic-electrical data.

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Design Improvements on Fast, High-Order, Incremental Sigma-Delta ADCs for Low-Noise Stacked CMOS Image Sensors

Electronics ◽

10.3390/electronics10161936 ◽

2021 ◽

Vol 10 (16) ◽

pp. 1936

Author(s):

Luis Miguel Carvalho Freitas ◽

Fernando Morgado-Dias

Keyword(s):

Low Power ◽

Dynamic Range ◽

Low Voltage ◽

Flicker Noise ◽

Image Sensor ◽

Low Noise ◽

Image Noise ◽

Frame Rate ◽

Direct Role ◽

Sigma Delta

Modern CMOS imaging devices are present everywhere, in the form of line, area and depth scanners. These image devices can be used in the automotive field, in industrial applications, in the consumer’s market, and in various medical and scientific areas. Particularly in industrial and scientific applications, the low-light noise performance or the high dynamic-range features are often the cases of interest, combined with low power dissipation and high frame rates. In this sense, the noise floor performance and the power consumption are the focus of this work, given that both are interlinked and play a direct role in the remaining sensor features. It is known that thermal and flicker noise sources are the main contributors to the degradation of the sensor performance, concerning the sensor output image noise. This paper presents an indirect way to reduce both the thermal and the flicker noise contributions by using thin-oxide low voltage supply column readout circuits and fast 3rd order incremental sigma-delta converters with noise shaping capabilities (to provide low noise output digital samples—74 μVrms; 0.7 e−rms; at 105 μV/e−), and thus performing correlated double sampling in a short time (19 μs), while dissipating significant low power (346 μW). Throughout the extensive parametric transistor-level simulations, the readout path produced 1.2% non-linearity, with a competitive saturation capacity (6.5 ke−) pixel. In addition, this paper addresses the readout parallelism as the main point of interest, decoupling resolution from the image noise and the frame rate, at virtually any array resolution. The design and simulations were performed with Virtuoso 6.17 tools (Cadence Design Systems, San Jose, CA, USA) using Spectre models from TS18IS Image Sensor 0.18 µm Process Development Kit (Tower Jazz Semiconductor, Migdal Haemek, Israel).

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Design of Low Power Underwater Acoustic Receiving Circuit with Digital Gain Control

Advanced Materials Research ◽

10.4028/www.scientific.net/amr.718-720.1416 ◽

2013 ◽

Vol 718-720 ◽

pp. 1416-1421

Author(s):

Ya Fei Tang ◽

Jian Ping Xiong

Keyword(s):

Low Power ◽

High Precision ◽

Dynamic Range ◽

Gain Control ◽

Low Noise ◽

Large Dynamic Range ◽

Underwater Acoustic ◽

Underwater Acoustic Signal ◽

To Receive

We propose a design of low power underwater acoustic receiving circuit by inverted echo sounder (IES) for observing the internal waves of the ocean in a long term. To receive the echo of the underwater targets, the underwater acoustic signal processor is required to be insensitive to strong noise and work in large dynamic range. In this work, with the variant application environments, to reduce the load of the subsequent processing modules, the circuit with digital gain control is employed to amplify the weak signals. Then, the out-of-band noise and higher harmonic are filtered out. The output is finally obtained by the 24-bit high-precision A/D sampling. Experiments demonstrate that the proposed design of the circuit performs with low power consumption, low noise, large dynamic range, flexible frequency selectivity, high precision and anti-inference.

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A Low-Noise, Low-Power, Wide Dynamic Range Logarithmic Amplifier for Biomedical Applications

Journal of Circuits System and Computers ◽

10.1142/s0218126618501049 ◽

2018 ◽

Vol 27 (07) ◽

pp. 1850104 ◽

Cited By ~ 2

Author(s):

Yuwadee Sundarasaradula ◽

Apinunt Thanachayanont

Keyword(s):

Low Power ◽

Biomedical Applications ◽

Dynamic Range ◽

Supply Voltage ◽

Low Noise ◽

Power Supply Voltage ◽

Wide Dynamic Range ◽

Dc Offset ◽

Limiting Amplifier ◽

Logarithmic Amplifier

This paper presents the design and realization of a low-noise, low-power, wide dynamic range CMOS logarithmic amplifier for biomedical applications. The proposed amplifier is based on the true piecewise linear function by using progressive-compression parallel-summation architecture. A DC offset cancellation feedback loop is used to prevent output saturation and deteriorated input sensitivity from inherent DC offset voltages. The proposed logarithmic amplifier was designed and fabricated in a standard 0.18[Formula: see text][Formula: see text]m CMOS technology. The prototype chip includes six limiting amplifier stages and an on-chip bias generator, occupying a die area of 0.027[Formula: see text]mm2. The overall circuit consumes 9.75[Formula: see text][Formula: see text]W from a single 1.5[Formula: see text]V power supply voltage. Measured results showed that the prototype logarithmic amplifier exhibited an 80[Formula: see text]dB input dynamic range (from 10[Formula: see text][Formula: see text]V to 100[Formula: see text]mV), a bandwidth of 4[Formula: see text]Hz–10[Formula: see text]kHz, and a total input-referred noise of 5.52[Formula: see text][Formula: see text]V.

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A 219-µW ultra-low power low-noise amplifier for IEEE 802.15.4 based battery powered, portable, wearable IoT applications

SN Applied Sciences ◽

10.1007/s42452-021-04402-0 ◽

2021 ◽

Vol 3 (4) ◽

Author(s):

S. Chrisben Gladson ◽

Adith Hari Narayana ◽

V. Thenmozhi ◽

M. Bhaskar

Keyword(s):

Low Power ◽

Ieee 802.15.4 ◽

Low Voltage ◽

Low Noise ◽

Low Noise Amplifier ◽

Cmos Process ◽

Process Technology ◽

Ultra Low Power ◽

Power Mode ◽

Noise Amplifier

AbstractDue to the increased processing data rates, which is required in applications such as fifth-generation (5G) wireless networks, the battery power will discharge rapidly. Hence, there is a need for the design of novel circuit topologies to cater the demand of ultra-low voltage and low power operation. In this paper, a low-noise amplifier (LNA) operating at ultra-low voltage is proposed to address the demands of battery-powered communication devices. The LNA dual shunt peaking and has two modes of operation. In low-power mode (Mode-I), the LNA achieves a high gain ($$S21$$ S 21 ) of 18.87 dB, minimum noise figure ($${NF}_{min.}$$ NF m i n . ) of 2.5 dB in the − 3 dB frequency range of 2.3–2.9 GHz, and third-order intercept point (IIP3) of − 7.9dBm when operating at 0.6 V supply. In high-power mode (Mode-II), the achieved gain, NF, and IIP3 are 21.36 dB, 2.3 dB, and 13.78dBm respectively when operating at 1 V supply. The proposed LNA is implemented in UMC 180 nm CMOS process technology with a core area of $$0.40{\mathrm{ mm}}^{2}$$ 0.40 mm 2 and the post-layout validation is performed using Cadence SpectreRF circuit simulator.

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Development of a new seismic-data acquisition station based on system-on-a-programmable-chip technology

Annals of Geophysics ◽

10.4401/ag-6309 ◽

2013 ◽

Vol 56 (3) ◽

Author(s):

Zhang Qi-sheng ◽

Deng Ming ◽

Guo Jian ◽

Luo Wei-bing ◽

Wang Qi ◽

...

Keyword(s):

Power Consumption ◽

Data Acquisition ◽

Digital Filter ◽

Data Transmission ◽

Seismic Data ◽

Low Noise ◽

High Definition ◽

Control Data ◽

Seismic Data Acquisition ◽

Transmission Speed

<p>There has been considerable development of seismic detectors over the last 80 years. However, there is still a need to further develop new earthquake exploration and data acquisition systems with high precision. In particular, for China to keep up with the latest technology of these systems, it is important to be involved in the research and development, instead of importing systems that soon fall behind the latest technology. In this study, the features of system-on-a-programmable-chip (SoPC) technology are analyzed and used to design a new digital seismic-data acquisition station. The hardware circuit of the station was developed, and the analog board and the main control data-transmission board were designed according to the needs of digital seismic-data acquisition stations. High-definition analog-to-digital converter sequential digital filter technology of the station (cascade integrator comb filter, finite impulse response digital filter) were incorporated to provide advantages to the acquisition station, such as high definition, large dynamic scope, and low noise. A specific data-transmission protocol was designed for the station, which ensured a transmission speed of 16 Mbps along a 55-m wire with low power consumption. Synchronic acquisition was researched and developed, so as to achieve accuracy better than 200 ns. The key technologies were integrated into the SoPC of the main control data-transmission board, so as to ensure high-resolution acquisition of the station, while improving the accuracy of the synchronic acquisition and data-transmission speed, lowering the power consumption, and preparing for the follow-up efforts to tape out.</p>

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Development of a distributed hybrid seismic–electrical data acquisition system based on the Narrowband Internet of Things (NB-IoT) technology

Geoscientific Instrumentation Methods and Data Systems ◽

10.5194/gi-8-177-2019 ◽

2019 ◽

Vol 8 (2) ◽

pp. 177-186 ◽

Cited By ~ 2

Author(s):

Wenhao Li ◽

Qisheng Zhang ◽

Qimao Zhang ◽

Feng Guo ◽

Shuaiqing Qiao ◽

...

Keyword(s):

Internet Of Things ◽

Data Acquisition ◽

High Precision ◽

Data Acquisition System ◽

Acquisition System ◽

Geophysical Prospecting ◽

Long Distance ◽

Data Acquisition Board ◽

Acquisition Processes ◽

Electrical Data

Abstract. The ambiguity of geophysical inversions, which is based on a single geophysical method, is a long-standing problem in geophysical exploration. Therefore, multi-method geophysical prospecting has become a popular topic. In multi-method geophysical prospecting, the joint inversion of seismic and electric data has been extensively researched for decades. However, the methods used for hybrid seismic–electric data acquisition that form the base for multi-method geophysical prospecting techniques have not yet been explored in detail. In this work, we developed a distributed, high-precision, hybrid seismic–electrical data acquisition system using advanced Narrowband Internet of Things (NB-IoT) technology. The system was equipped with a hybrid data acquisition board, a high-performance embedded motherboard based on field-programmable gate array, an advanced RISC machine, and host software. The data acquisition board used an ADS1278 24 bit analog-to-digital converter and FPGA-based digital filtering techniques to perform high-precision data acquisition. The equivalent input noise of the data acquisition board was only 0.5 µV with a sampling rate of 1000 samples per second and front-end gain of 40 dB. The multiple data acquisition stations of our system were synchronized using oven-controlled crystal oscillators and global positioning system technologies. Consequently, the clock frequency error of the system was less than 10−9 Hz at 1 Hz after calibration, and the synchronization accuracy of the data acquisition stations was ±200 ns. The use of sophisticated NB-IoT technologies allowed the long-distance wireless communication between the control center and the data acquisition stations. In validation experiments, it was found that our system was operationally stable and reliable, produced highly accurate data, and it was functionally flexible and convenient. Furthermore, using this system, it is also possible to monitor the real-time quality of data acquisition processes. We believe that the results obtained in this study will drive the advancement of prospective integrated seismic–electrical technologies and promote the use of IoT technologies in geophysical instrumentation.

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Development of high-precision distributed wireless microseismic acquisition stations

10.5194/gi-2018-17 ◽

2018 ◽

Author(s):

Shuaiqing Qiao ◽

Hongmei Duan ◽

Qisheng Zhang ◽

Qimao Zhang ◽

Shuhan Li ◽

...

Keyword(s):

Data Acquisition ◽

High Precision ◽

Oil And Gas ◽

Data Communication ◽

Microseismic Monitoring ◽

Acquisition System ◽

Seismic Exploration ◽

High Signal ◽

Control Board ◽

High Data

Abstract. In recent years, owing to the shortage of oil and gas resources and increased difficulty in mining, traditional (wired) microseismic monitoring equipment has been unable to meet the needs of energy exploitation. Therefore, it is necessary to develop new high-precision seismic exploration and data acquisition systems. In this study, we combined advance acquisition systems with wireless technology to develop a new wireless microseismic acquisition system. The hardware circuit of the acquisition system mainly included a data acquisition board and a main control board. High-precision analog-to-digital conversion and digital filtering technologies were used to provide data with high signal-to-noise ratios, resolution, and fidelity to the acquisition stations. Key technologies were integrated into the ARM of the main control board. Reliable GPS technology was employed to realize synchronous acquisitions among various acquisition stations, and WIFI technology was used to achieve wireless data communication between acquisition stations and the central station, thus improving the data transmission speed and accuracy. After conducting a series of evaluation tests, it was found that the system was stable, convenient to use, and had high data accuracy, therefore providing significant support for the solution to problems encountered in current oil and gas exploration processes, such as the complicated environment and inconvenient construction.

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