scholarly journals New Hybrid-Based Self-Test Strategy for Faulty Modules of Complex Microcontroller Systems

2019 ◽  
Vol 22 (2) ◽  
pp. 59
Author(s):  
Mohamed H. El-Mahlawy ◽  
Sherif Hussein ◽  
Gouda I. Mohamed
Keyword(s):  
Integrated Circuits ◽  
General Purpose ◽  
Instruction Set ◽  
Circuit Boards ◽  
Test Strategy ◽  
Test Application ◽  
Hybrid Test ◽  
Self Test ◽  
Pattern Generators ◽  
Multi Mode

In this paper, a new hybrid test strategy, called hybrid-based self-test (HYBST), is presented to test complex digital circuits such as microcontrollers. This test strategy integrates the signature multi-mode hardware-based self-test (SM-BST) with the software-based self-test (SBST). In this test strategy, the microcontroller is divided into a number of main modules, and then test subroutines are used to functionally test each module, based on its instruction set architecture (ISA). The ISA is used to generate test subroutines that represent test pattern generators (TPGs) and part of the test controller. The SMHBST represents the other part of the test controller and the test response compaction (TRC). The experimental results illustrate the superiority of the HYBST in the memory utilization, test application time, testing of internal modules of the microcontroller, and testing of general-purpose input-output (GPIO) pins of the microcontroller. In addition, an integrated test solution for fault diagnosis of the circuit boards including random logic integrated circuits (ICs) and microcontroller chips is presented to indicate a real practical test strategy.

scholarly journals A New Hybrid Test Pattern Generator for Stuck-at –Fault and Path Delay Fault in Scan Based Bist

2018 ◽  
Vol 7 (3.27) ◽  
pp. 476
Author(s):  
C Karthikeyini ◽  
K Anandhi
Keyword(s):  
Test Pattern ◽  
Hybrid Approach ◽  
Path Delay ◽  
Speed Test ◽  
Pattern Pair ◽  
Unique Approach ◽  
Hybrid Test ◽  
Test Sets ◽  
Self Test ◽  
Pattern Generators

Testing for delay and stuck-at faults needs a pattern of two checks and test sets square measure sometimes more. Built self-test (BIST) schemes square measure enticing for such comprehensive testing. The BIST check pattern generators (TPGs) for such testing ought to be designed accustomed guarantee high pattern-pair coverage. Within the planned work, necessary and decent conditions to complete/ supreme pattern-pair coverage for consecutive circuit has been derived. A replacement check data-compression theme that's a hybrid approach between external testing and inbuilt self-test (BIST) is analyzed. The planned approach is predicated on weighted pseudorandom testing and uses a unique approach for pressing and storing the load sets. Most existing check generation tools square measure either inefficient in mechanically characteristic the longest checkable methods thanks to the high process complexness or don't support at speed test mistreatment existing sensible design-for-testability structures, like scan style. During this work a check generation methodology for scan-based synchronous consecutive circuits is conferred, below 2 at-speed check methods employed in trade. The approach provides a balanced trade-off between accuracy and potency. Experimental results show promising runtime and fault coverage enhancements over existing ways. 

Hybrid Test Application in Partial Skewed-Load Scan Design

2011 ◽  
Vol E94-A (12) ◽  
pp. 2571-2578
Author(s):  
Yuki YOSHIKAWA ◽  
Tomomi NUWA ◽  
Hideyuki ICHIHARA ◽  
Tomoo INOUE
Keyword(s):  
Scan Design ◽  
Test Application ◽  
Hybrid Test

A 45-nm 37.3 GOPS/W Heterogeneous Multi-Core SOC with 16/32 Bit Instruction-Set General-Purpose Core

2011 ◽  
Vol E94-C (4) ◽  
pp. 663-669
Author(s):  
Osamu NISHII ◽  
Yoichi YUYAMA ◽  
Masayuki ITO ◽  
Yoshikazu KIYOSHIGE ◽  
Yusuke NITTA ◽  
...  
Keyword(s):  
General Purpose ◽  
Instruction Set

scholarly journals Evaluation of Concurrent Validity between a Smartphone Self-Test Prototype and Clinical Instruments for Balance and Leg Strength

Sensors ◽  
2021 ◽  
Vol 21 (5) ◽  
pp. 1765
Author(s):  
Linda Mansson ◽  
Pernilla Bäckman ◽  
Fredrik Öhberg ◽  
Jonas Sandlund ◽  
Jonas Selling ◽  
...  
Keyword(s):  
Older Adults ◽  
Concurrent Validity ◽  
Test Validity ◽  
Strength Test ◽  
Test Procedures ◽  
Balance Test ◽  
Clinical Assessments ◽  
Leg Strength ◽  
Test Application ◽  
Self Test

The evolving use of sensors to objectively assess movements is a potentially valuable addition to clinical assessments. We have developed a new self-test application prototype, MyBalance, in the context of fall prevention aimed for use by older adults in order to independently assess balance and functional leg strength. The objective of this study was to investigate the new self-test application for concurrent validity between clinical instruments and variables collected with a smartphone. The prototype has two test procedures: static standing balance test in two positions, and leg strength test performed as a sit-to-stand test. Thirty-one older adults were assessed for balance and functional leg strength, in an outpatient physiotherapy setting, using seven different clinical assessments and three sensor-tests. The results show that clinical instruments and sensor measurements correlate to a higher degree for the smartphone leg strength test. For balance tests, only a few moderate correlations were seen in the Feet Together position and no significant correlations for the Semi Tandem Stance. This study served as a first step to develop a smartphone self-test application for older adults to assess functional balance at home. Further research is needed to test validity, reliability, and user-experience of this new self-test application.

Suitable Conditions for Effective Inter Chip Communication based on Surface Wave Phenomenon

2021 ◽  
Vol 14 ◽  
Author(s):  
Mahaveer Penna ◽  
Shiva Shankar ◽  
Keshava Murthy ◽  
Jijesh J J
Keyword(s):  
Surface Wave ◽  
Integrated Circuits ◽  
Electromagnetic Waves ◽  
Printed Circuit Boards ◽  
Analytical Models ◽  
Circuit Boards ◽  
High Frequencies ◽  
Printed Circuit ◽  
High Data ◽  
Low Dispersion

Background: The communication between two Integrated Circuits (IC) of the Printed Circuit Boards (PCB) currently happening through copper traces which allow electric charge to flow. Several limitations being encountered with the copper traces during high data rate communication because of the resistivity factors, which eventually leads to the damage of traces and the system. Methods: The solution for this issue comes with the design of surface wave communication-based waveguide/channel between the IC’s. Surface wave communication over a specified communication fabric/channel performs the propagation of electromagnetic waves effectively even at high frequencies compared to the copper traces using conductor-dielectric combination. This paper deals in revealing suitable conditions through profound analytical models for achieving effective surface wave communication between the pins of integrated circuits. Results: The analysis includes defining the possible wave propagation terms, suitable channel design aspects for PCB application and corresponding analysis for effective communication at frequencies from 50GHz to 500GHz of millimeter range. This study provides the roadmap to explore a deterministic channel/fabric for pin to pin communication between the IC’s as an alternate for the copper traces. Conclusion: In this process, the proposed channel achieves low dispersion compared to the copper traces at millimeter frequency range.

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