Hybrid Test Application in Partial Skewed-Load Scan Design

In this paper, a new hybrid test strategy, called hybrid-based self-test (HYBST), is presented to test complex digital circuits such as microcontrollers. This test strategy integrates the signature multi-mode hardware-based self-test (SM-BST) with the software-based self-test (SBST). In this test strategy, the microcontroller is divided into a number of main modules, and then test subroutines are used to functionally test each module, based on its instruction set architecture (ISA). The ISA is used to generate test subroutines that represent test pattern generators (TPGs) and part of the test controller. The SMHBST represents the other part of the test controller and the test response compaction (TRC). The experimental results illustrate the superiority of the HYBST in the memory utilization, test application time, testing of internal modules of the microcontroller, and testing of general-purpose input-output (GPIO) pins of the microcontroller. In addition, an integrated test solution for fault diagnosis of the circuit boards including random logic integrated circuits (ICs) and microcontroller chips is presented to indicate a real practical test strategy.

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Parity-scan design to reduce the cost of test application

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/43.256936 ◽

1993 ◽

Vol 12 (10) ◽

pp. 1604-1611 ◽

Cited By ~ 29

Author(s):

H. Fujiwara ◽

A. Yamamoto

Keyword(s):

Scan Design ◽

Test Application ◽

The Cost

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COMPASES: AN OPTIMIZED DESIGN FOR TESTABILITY SCHEME TO REDUCE THE COST OF TEST APPLICATION USING PARALLEL-SERIAL SCAN DESIGN

Journal of Circuits System and Computers ◽

10.1142/s0218126607003678 ◽

2007 ◽

Vol 16 (03) ◽

pp. 467-488

Author(s):

JOSÉ M. SOLANA

Keyword(s):

Structure Design ◽

Test Scheme ◽

Optimized Design ◽

Test Length ◽

Scan Design ◽

Scan Test ◽

Test Application ◽

Scan Path ◽

Full Scan ◽

The Cost

A full-scan structure is described, in which the classic single serial scan-path and the parallel-in/serial-out scan (PASE-Scan) designs coexist. It requires only one extra pin and a small hardware overhead with respect to the single serial scan-path approach, and is compatible with a test scheme of this type. A method for the structure design is outlined and a structure-oriented optimized procedure for obtaining the test is proposed which considerably reduces the test application cost with respect to the serial scan case, improving the previous results for parallel-serial designs. The experiments performed with the ISCAS89 benchmarks show average reductions in test length of 60.6% with respect to its full serial scan counterpart and of 58.7%, with respect to a conventional full serial scan test with normal compaction. The advantage of the COMPASES scheme in testing some circuits with multiple PASE-Scan structures is also outlined.

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Reducing test application time in scan design schemes

Proceedings 13th IEEE VLSI Test Symposium ◽

10.1109/vtest.1995.512662 ◽

2002 ◽

Cited By ~ 1

Author(s):

B. Vinnakota ◽

N.J. Stessman

Keyword(s):

Application Time ◽

Scan Design ◽

Test Application Time ◽

Test Application

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Timing Sensitivity Analysis of Logical Nodes in Scan Design Integrated Circuits by Pulsed Diode Laser Stimulation

ISTFA 2008: Conference Proceedings from the 34th International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2008p0180 ◽

2008 ◽

Author(s):

T. Kiyan ◽

C. Boit ◽

C. Brillert

Keyword(s):

Laser Pulse ◽

Integrated Circuits ◽

Continuous Wave ◽

Fault Injection ◽

Scan Design ◽

Flip Flop ◽

Laser Stimulation ◽

Scan Chain ◽

P Type ◽

Scan Pattern

Abstract In this paper, a methodology based upon laser stimulation and a comparison of continuous wave and pulsed laser operation will be presented that localizes the fault relevant sites in a fully functional scan chain cell. The technique uses a laser incident from the backside to inject soft faults into internal nodes of a master-slave scan flip-flop in consequence of localized photocurrent. Depending on the illuminated type of the transistors (n- or p-type), injection of a logic ‘0’ or ‘1’ into the master or the slave stage of a flip-flop takes place. The laser pulse is externally triggered and can easily be shifted to various time slots in reference to clock and scan pattern. This feature of the laser diode allows triggering the laser pulse on the rising or the falling edge of the clock. Therefore, it is possible to choose the stage of the flip-flop in which the fault injection should occur. It is also demonstrated that the technique is able to identify the most sensitive signal condition for fault injection with a better time resolution than the pulse width of the laser, a significant improvement for failure analysis of integrated circuits.

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Detection of the TiO2 Concentration in the Protective Coatings for the Cultural Heritage by Means of Hyperspectral Data

Sustainability ◽

10.3390/su13010092 ◽

2020 ◽

Vol 13 (1) ◽

pp. 92

Author(s):

Antonio Costanzo ◽

Donatella Ebolese ◽

Silvestro Antonio Ruffolo ◽

Sergio Falcone ◽

Carmelo la Piana ◽

...

Keyword(s):

Titanium Dioxide ◽

Cultural Heritage ◽

Urban Areas ◽

Protective Coatings ◽

Colloidal Suspensions ◽

Hyperspectral Data ◽

Weight Percentage ◽

Stone Materials ◽

Test Application ◽

Nanoparticle Coatings

Nanotechnology-based materials are currently being tested in the protection of cultural heritage: ethyl silicate or silica nanoparticles dispersed in aqueous colloidal suspensions mixed with titanium dioxide are used as a coating for stone materials. These coatings can play a key role against the degradation of stone materials, due to the deposit of organic matter and other contaminants on the substrate, a phenomenon that produces a greater risk for the monuments in urban areas because of the increasing atmospheric pollution. However, during the application phase, it is important to evaluate the amount of titanium dioxide in the coatings on the substrate, as it can produce a coverage effect on the asset. In this work, we present the hyperspectral data obtained through a field spectroradiometer on samples of different stone materials, which have been prepared in laboratory with an increasing weight percentage of titanium dioxide from 0 to 8 wt%. The data showed spectral signatures dependent on the content of titanium dioxide in the wavelength range 350–400 nm. Afterwards, blind tests were performed on other samples in order to evaluate the reliability of these measurements in detecting the unknown weight percentage of titanium dioxide. Moreover, an investigation was also performed on a test application of nanoparticle coatings on a stone statue located in a coastal town in Calabria (southern Italy). The results showed that the surveys can be useful for verifying the phase of application of the coating on cultural heritage structures; however, they could also be used to check the state of the coated stone directly exposed over time to atmospheric, biological and chemical agents.

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