A high density FinFET one-time programmable cell with new intra-fin cell isolation for advanced system on chip applications

2016 ◽  
Vol 55 (4S) ◽  
pp. 04EE06 ◽  
Author(s):  
Yu-Zheng Chen ◽  
Jo En Yuan ◽  
Ping Chun Peng ◽  
Woan Yun Hsiao ◽  
Ya-Chin King ◽  
...  
Keyword(s):  
Cell Isolation ◽  
System On Chip ◽  
High Density ◽  
On Chip ◽  
Advanced System

scholarly journals Self-Rectified Graphite-Based Reprogrammable One-Time Programmable (RS-OTP) Memory for Embedded Applications

2021 ◽  
Vol 3 ◽  
Author(s):  
Ying-Chen Chen
Keyword(s):  
Internet Of Things ◽  
Low Power ◽  
System On Chip ◽  
Security System ◽  
High Density ◽  
Promising Candidate ◽  
Emerging Memory ◽  
High Scalability ◽  
On Chip ◽  
Embedded Applications

A graphite-based RRAM device with a self-rectifying characteristic named “non-linearity (NL)” is developed for a high-density crossbar array for in-memory computing with low power and high scalability. Meanwhile, the reprogrammable functions are presented in self-selected RRAM as a promising candidate for one-time programmable (OTP) in the emerging memory-embedded applications such as security, system-on-chip (SoC), and Internet of Things (IoT).

Memory Implementation in a System on Chip with Built-in Self-Test and Recovery Tools

2019 ◽  
Vol 24 (3) ◽  
pp. 239-247
Author(s):  
Vladimir G. Ryabtsev ◽  
◽  
Sergey V. Volobuev ◽  
Keyword(s):  
System On Chip ◽  
Self Test ◽  
Built In Self Test ◽  
On Chip ◽  
Recovery Tools

Multiprocessor transport surveillance video system based on "system on chip" technology

2020 ◽  
Author(s):  
Ш.С. Фахми ◽  
Н.В. Шаталова ◽  
В.В. Вислогузов ◽  
Е.В. Костикова
Keyword(s):  
System On Chip ◽  
Reference Points ◽  
Surveillance Video ◽  
Video Information ◽  
Chip Technology ◽  
Intelligent Video Surveillance System ◽  
Speed Up ◽  
Algorithmic Analysis ◽  
Computational Procedures ◽  
On Chip

В данной работе предлагаются математический аппарат и архитектура многопроцессорной транспортной системы на кристалле (МПТСнК). Выполнена программно-аппаратная реализация интеллектуальной системы видеонаблюдения на базе технологии «система на кристалле» и с использованием аппаратного ускорителя известного метода формирования опорных векторов. Архитектура включает в себя сложно-функциональные блоки анализа видеоинформации на базе параллельных алгоритмов нахождения опорных точек изображений и множества элементарных процессоров для выполнения сложных вычислительных процедур алгоритмов анализа с использованием средств проектирования на базе реконфигурируемой системы на кристалле, позволяющей оценить количество аппаратных ресурсов. Предлагаемая архитектура МПТСнК позволяет ускорить обработку и анализ видеоинформации при решении задач обнаружения и распознавания чрезвычайных ситуаций и подозрительных поведений. In this paper, we propose the mathematical apparatus and architecture of a multiprocessor transport system on a chip (MPTSoC). Software and hardware implementation of an intelligent video surveillance system based on the "system on chip" technology and using a hardware accelerator of the well-known method of forming reference vectors. The architecture includes complex functional blocks for analyzing video information based on parallel algorithms for finding image reference points and a set of elementary processors for performing complex computational procedures for algorithmic analysis. using design tools based on a reconfigurable system on chip that allows you to estimate the amount of hardware resources. The proposed MPTSoC architecture makes it possible to speed up the processing and analysis of video information when solving problems of detecting and recognizing emergencies and suspicious behaviors

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