ANALISIS ANTENATAL CARE (ANC) PADA SURVEILANS KESEHATAN IBU DAN ANAK DENGAN TAHAPAN AGREGASI PIPELINE NOSQL

Case 30.8 percent of Indonesian children under five are stunted. Bantul is a district in the Province of D.I. Yogyakarta, Indonesia, is a locus of stunting. Bantul has ten villages. The ten villages include Patalan Jetis Village, Canden Jetis Village, Terong Dlingo Village, Argodadi Sedayu Village, Triharjo Pandak Village, Triwidadi Pajangan Village, Jatimulyo Dlingo Village, Datangharjo Sewon Village, Sendangsari Pajangan Village, and Trimulyo Jetis Village. The research focuses on the village of Argodadi Sedayu. In the village of Argodadi Sedayu, Antenatal Care (ANC) research would be conducted. Antenatal Care (ANC) is a pregnancy check by a doctor or midwife. Therefore, Antenatal Care Analysis (ANC) is needed to determine whether diet, parenting, and sanitation are well programmed. Antenatal care (ANC) research framework was a model of method improvement. The method improvement model consists of indicators, proposed methods, objectives, and measurements. The indicators consist of monitoring instruments and health visits. The proposed method uses an aggregation pipeline stage. The data was processed in the aggregation pipeline stage. The data were obtained from the time series data surveillance dataset. The research objective was to analyze the research results accurately according to the proposed method. Measurement of indicator analysis with the application of the dashboard as a performance indicator on the research results. Practically, it is hoped that the research results could consider the health office and related institutions in reducing or even elevating Argodadi Sedayu Village in Yogyakarta as a non-locus of stunting using massive monitoring of diet, parenting, and sanitation well programmed.

AREA-EFFICIENT DIGIT SERIAL–SERIAL TWO'S COMPLEMENT MULTIPLIER

Although parallel multipliers are optimal for speed, they occupy considerable chip area. For applications with lengthy operands as cryptography, the required area grows further. On the other hand, digit multipliers reduce chip area at the expense of the number of cycles required to complete the multiplication. In such multipliers, one-or-both inputs are received serially one digit per cycle. Digit multiplier designs are flexible with respect to the digit width enabling designers to select the most suitable compromise between area and cycle count for the application under consideration. This paper proposes a new digit serial–serial multiplier that is more area efficient compared to other functionally-similar multipliers. First, we propose a new unsigned digit serial–serial multiplier that is area efficient. The multiplier has the ability to handle unequal-width operands. That is, one operand can be of dynamic width (unlimited digit count) and the other operand is of fixed width. Moreover, with a small modification, the multiplier can operate on two's complement operands. Then, the design is extended to support bit-level pipelining: the critical path of the multiplier pipeline stage is independent of the operand width and the digit width. Simulation results show that the proposed multiplier reduces the area over similar multipliers by up to 28% and reduces power by up to 31%.