Field Test for a Base Isolation Structure on Condition of Horizontal and Initial Displacement

There are a few isolated structures that have been subjected to seismic testing. An isolated structure is incapable of tracking, adjusting, and controlling its dynamic characteristics. As a result, field evaluations of solitary structures’ dynamic characteristics are important. The horizontal initial displacement of a base isolation kindergarten made of 46 isolation bearings is 75 mm. The method for creating the horizontal initial displacement condition is illustrated, as are the primary test findings. Horizontal initial displacement is accomplished with the assistance of a reaction wall, rods, and hydraulic pump system. To begin, we removed the building using hydraulic jacks to produce horizontal displacement of the isolation layer and then attached rods to support the building. The rods were then shot and unloaded, causing the building to shake freely, and its dynamic response and other parameters were tested. The results indicate that the natural vibration period of an isolated structure is much greater than the natural vibration period of a seismic structure. The isolation layer’s hysteretic curve as completely filled; upon unloading, the isolation layer as promptly reset; the dynamic response control effect of each was visible, but the top floor’s acceleration was magnified by approximately 1.27 times.

Verification of a Stiffness-Variable Control System with Feed-Forward Predictive Earthquake Energy Analysis

Semi-active isolation systems with controllable stiffness have been widely developed in the field of seismic mitigation. Most systems with controllable stiffness perform more robustly and effectively for far-field earthquakes than for near-fault earthquakes. Consequently, a comprehensive system that provides comparable reductions in seismic responses to both near-fault and far-field excitations is required. In this regard, a new algorithm called Feed-Forward Predictive Earthquake Energy Analysis (FPEEA) is proposed to identify the ground motion characteristics of and reduce the structural responses to earthquakes. The energy distribution of the seismic velocity spectrum is considered, and the balance between the kinetic energy and potential energy is optimized to reduce the seismic energy. To demonstrate the performance of the FPEEA algorithm, a two-degree-of-freedom structure was used as the benchmark in the numerical simulation. The peak structural responses under two near-fault and far-field earthquakes of different earthquake intensities were simulated. The isolation layer displacement was suppressed most by the FPEEA, which outperformed the other three control methods. Moreover, superior control on superstructure acceleration was also supported by the FPEEA. Experimental verification was then conducted with shaking table test, and the satisfactory performance of the FPEEA on both isolation layer displacement and superstructure acceleration was demonstrated again. In summary, the proposed FPEEA has potential for practical application to unexpected near-fault and far-field earthquakes.

Enhanced Breakdown Voltage of Si-GaN Monolithic Heterogeneous Integrated Cascode FETs by the Device Structure Design

In this work, the factors affecting the breakdown voltage of Si-GaN monolithic heterogeneous integrated Casccode FET fabricated by transfer printing were investigated. These two factors are the avalanche breakdown resistance of the Si device and the thickness of SiN electrical isolation layer. Two kinds of device structures, Si MOSFET and Si laterally-diffused MOSFET (LDMOSFET), were designed to study the effect of the avalanche breakdown resistance of the Si devices on the breakdown characteristics of Cascode FET. The effect of the thickness of SiN electrical isolation layer was analyzed. Finally, the breakdown voltage of monolithic integrated Cascode FET reached 770 V.

The Effect of Wafer Edge Cu Contamination on FinFET Devices

The effect of copper (Cu) contamination inside the Si substrate from the wafer edge to the nearby devices has been investigated. After the Cu seed layer deposition, Cu contacted directly with Si at wafer edge where dielectric isolation layer was removed. Under the routine BEOL metallization and after the capping SiON/Si2O layers, SEM and AES analysis located a strip of islets of Cu contaminants. TEM analysis revealed that the seed Cu had interacted with Si substrate to form a stable ?-Cu3Si intermetallic compound that appeared to be planted into the Si substrate at the surface. SIMS analysis from the wafer backside, opposite to this strip of ?-Cu3Si islets at front, showed no Cu detection even after the majority of the backside Si was removed by grinding. Electrical nano-probing did not discern any parametric drift for the nanometer FinFET devices on chips near the edge surface of massive ?-Cu3Si islets in comparison with a reference chip from an uncontaminated wafer center. These results indicate that the formation of ?-Cu3Si, with a well-defined crystalline structure and a relatively stable stoichiometry, immobilizes Cu diffusion inside the Si substrate. In other word, the impact of Cu diffusion in Si has no effect on device performances as long as ?-Cu3Si is not directly formed in the FinFET channel or presents to short any structures within the chip.