Performance and Manufacturing of Silicon-Based Vapor Chambers

This paper reviews recent progress in the development of silicon-based vapor chambers for heat spreading in electronic packages. Effective hotspot mitigation is an increasingly challenging issue in electronics thermal management, and the use of silicon vapor chambers creates opportunities for thermal-expansion matched, high performance heat spreaders that can be directly integrated with the semiconductor die. While silicon microheat pipes have been extensively studied as one-dimensional heat transport mechanisms for heat routing in semiconductor substrates, silicon vapor chambers require special consideration and different manufacturing approaches due to the different heat transport configurations involved. The following review therefore provides an overview on the evolution of silicon vapor chambers in terms of fabrication strategies and performance characterization. Particular focus is given to opportunities and challenges associated with using silicon as the vapor chamber envelope material rather than more traditional metal-based vapor chambers, such as the ability to optimize the wick geometry with greater fidelity and issues with manufacturing scalability.

Study of Miniaturization of a Silicon Vapor Chamber for Compact 3D Microelectronics, via a Hybrid Analytical and Finite Element Method

The interest in silicon vapor chambers (SVCs) has increased in the recent years as they have been identified as efficient cooling systems for microelectronics. They present the advantage of higher thermal conductivity and smaller form factor compared to conventional heat spreaders. This work aims to investigate the potential miniaturization of these devices, preliminary to integration on the backside of mobile device chips, located as close as possible to hotspots. While detailed numerical models of vapor chamber operation are developed, an easy modeling with low computational cost is needed for an effective parametric study. Based on the study of the operating limits, this paper shows the thinning potential of a water filled micropillar for a device operating below 10 W and identify the corresponding vapour core height, and wick thickness.

Study of Miniaturization of a Silicon Vapor Chamber for Compact 3D Microelectronics, via a Hybrid Analytical and Finite Element Method

The interest in silicon vapor chambers (SVCs) has increased in the recent years as they have been identified as efficient cooling systems for microelectronics. They present the advantage of higher thermal conductivity and smaller form factor compared to conventional heat spreaders. This work aims to investigate the potential miniaturization of these devices, preliminary to integration on the backside of mobile device chips, located as close as possible to hotspots. While detailed numerical models of vapor chamber operation are developed, an easy modeling with low computational cost is needed for an effective parametric study. Based on the study of the operating limits, this paper shows the thinning potential of a water filled micropillar for a device operating below 10 W and identify the corresponding vapour core height, and wick thickness.

Core-Shell and Hollow Particles of Carbon and SiC Prepared from Hydrochar

The applications of silicon carbide (SiC) include lightweight materials with thermal shock resistance. In this study, core-shell C-SiC particles were synthesized by compacting and rapidly heating a hydrochar from glucose by using strong pulsed currents and infiltration of silicon vapor. Hollow particles of SiC formed on removing the carbon template. In contrast to related studies, we detected not only the pure 3C polytype (β-SiC) but also significant amounts of the 2H or the 6H polytypes (α-SiC) in the SiC.