scholarly journals Automated design of a linear microwave monolithic distributed amplifier

2021 ◽  
pp. 40-48
Author(s):  
A. A. Metel ◽  
T. N. Fail ◽  
Y. A. Novichkova ◽  
I. M. Dobush ◽  
A. Е. Goryainov ◽  
...  
Keyword(s):  
Integrated Circuit ◽  
Automated Design ◽  
Automated Synthesis ◽  
Microwave Integrated Circuit ◽  
Ic Design ◽  
Stage Design ◽  
Circuit Topology ◽  
Saint Petersburg ◽  
Distributed Amplifier ◽  
Buffer Amplifier

Microwave integrated circuit (IC) design tends to become more efficient and less expensive which leads to emerging the circuit topology and layout synthesis software. In the paper we present a technique and an algorithm for microwave distributed amplifier (DA) automated synthesis based on requirements to linear characteristics. The technique feature is the using of active and passive element’s models for a chosen IC process. This allow the technique to generate circuit topology which can be manufactured using a given IC process. The proposed DA automated design technique work was demonstrated with preamplifier stage design for 20–30 GHz buffer amplifier MMIC based on the 0.25um GaAs pHEMT process of Svetlana-Rost foundry in Saint-Petersburg.

Application of Fast Laser Deprocessing Techniques in Physical Failure Analysis on SRAM Memory of Advance Technology

2014 ◽  
Author(s):  
H.H. Yap ◽  
P.K. Tan ◽  
G.R. Low ◽  
M.K. Dawood ◽  
H. Feng ◽  
...  
Keyword(s):  
Failure Analysis ◽  
Integrated Circuit ◽  
Cost Effective ◽  
Tetraethyl Orthosilicate ◽  
Ic Design ◽  
Advance Technology ◽  
Defect Identification ◽  
Technology Scaling ◽  
And Function ◽  
Metal Layers

Abstract With technology scaling of semiconductor devices and further growth of the integrated circuit (IC) design and function complexity, it is necessary to increase the number of transistors in IC’s chip, layer stacks, and process steps. The last few metal layers of Back End Of Line (BEOL) are usually very thick metal lines (>4μm thickness) and protected with hard Silicon Dioxide (SiO2) material that is formed from (TetraEthyl OrthoSilicate) TEOS as Inter-Metal Dielectric (IMD). In order to perform physical failure analysis (PFA) on the logic or memory, the top thick metal layers must be removed. It is time-consuming to deprocess those thick metal and IMD layers using conventional PFA workflows. In this paper, the Fast Laser Deprocessing Technique (FLDT) is proposed to remove the BEOL thick and stubborn metal layers for memory PFA. The proposed FLDT is a cost-effective and quick way to deprocess a sample for defect identification in PFA.

РАЗРАБОТКА СВЧ МОНОЛИТНЫХ ИНТЕГРАЛЬНЫХ СХЕМ МИЛЛИМЕТРОВОГО ДИАПАЗОНА НА ОСНОВЕ GAAS ДЛЯ ПРИМЕНЕНИЯ В СОВРЕМЕННЫХ ИНФОРМАЦИОННОКОММУНИКАЦИОННЫХ СИСТЕМАХ НОВОГО ПОКОЛЕНИЯ (5G)

2020 ◽  
Vol 96 (3s) ◽  
pp. 321-324
Author(s):  
Е.В. Ерофеев ◽  
Д.А. Шишкин ◽  
В.В. Курикалов ◽  
А.В. Когай ◽  
И.В. Федин
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
Integrated Circuit ◽  
Phase Shifter ◽  
Phase Error ◽  
Microwave Integrated Circuit ◽  
Gain Compression ◽  
Monolithic Microwave Integrated Circuit ◽  
And Performance ◽  
Power Capability

В данной работе представлены результаты разработки СВЧ монолитной интегральной схемы шестиразрядного фазовращателя и усилителя мощности диапазона частот 26-30 ГГц. СКО ошибки по фазе и амплитуде фазовращателя составили 1,2 град. и 0,13 дБ соответственно. Максимальная выходная мощность и КПД по добавленной мощности усилителя в точке сжатия Ку на 1 дБ составили 30 дБм и 20 % соответственно. This paper describes the design, layout, and performance of 6-bit phase shifter and power amplifier monolithic microwave integrated circuit (MMIC), 26-30 GHz band. Phase shifter MMIC has RMS phase error of 1.2 deg. And RMD amplitude error is 0.13 dB. MMIC power amplifier has output power capability of 30 dBm at 1 dB gain compression (P-1dB) and PAE of 20 %.

Performance Analysis of Interconnects Based on Carbon Nanotubes for AMS/RF IC Design

2015 ◽  
pp. 336-363 ◽  
Author(s):  
Rafael Vargas-Bernal
Keyword(s):  
Carbon Nanotubes ◽  
Performance Analysis ◽  
Integrated Circuit ◽  
High Speed ◽  
Electrical Current ◽  
Essential Elements ◽  
Thermal Dissipation ◽  
Electrical Performance ◽  
Ic Design ◽  
Rf Ic

Electrical interconnects are essential elements to transmit electrical current and/or to apply electrical voltage to the electronic devices found in an integrated circuit. With the introduction of carbon nanotubes in electronic applications, efficient and high-speed interconnects have allowed for optimizing the electrical performance of the integrated circuits. Additionally, technical problems, such as electromigration, large values of parasitic elements, large delays, and high thermal dissipation, presented in metallic interconnects based on copper, can be avoided. This chapter presents a performance analysis of interconnects used in AMS/RF IC design based on carbon nanotubes as the physical material where electrical variables are provided.

scholarly journals Numerical Laplace Inversion Method for Through-Silicon Via (TSV) Noise Coupling in 3D-IC Design

Electronics ◽  
2019 ◽  
Vol 8 (9) ◽  
pp. 1010 ◽  
Author(s):  
Khaoula Ait Belaid ◽  
Hassan Belahrach ◽  
Hassan Ayad
Keyword(s):  
Integrated Circuit ◽  
Inversion Method ◽  
Ic Design ◽  
3D Ic ◽  
Noise Coupling ◽  
Source Characteristics ◽  
Coupling Noise ◽  
The Time Domain ◽  
Silicon Vias ◽  
Domain Coupling

Typical 3D integrated circuit structures based on through-silicon vias (TSVs) are complicated to study and analyze. Therefore, it seems important to find some methods to investigate them. In this paper, a method is proposed to model and compute the time-domain coupling noise in 3D Integrated Circuit (3D-IC) based on TSVs. It is based on the numerical inversion Laplace transform (NILT) method and the chain matrices. The method is validated using some experimental results and the Pspice and Matlab tools. The results confirm the effectiveness of the proposed technique and the noise is analyzed in several cases. It is found that TSV noise coupling is affected by different factors such as source characteristics, horizontal interconnections, and the type of Inputs and Outputs (I/O) drivers.

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