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Micromachines ◽  
2021 ◽  
Vol 12 (4) ◽  
pp. 402
Author(s):  
Ning Liu ◽  
Tianqi Tian ◽  
Zhong Su ◽  
Wenhao Qi

This paper studies the measurement of motion parameters of a parachute scanning platform. The movement of a parachute scanning platform has fast rotational velocity and a complex attitude. Therefore, traditional measurement methods cannot measure the motion parameters accurately, and thus fail to satisfy the requirements for the measurement of parachute scanning platform motion parameters. In order to solve these problems, a method for measuring the motion parameters of a parachute scanning platform based on a combination of magnetic and inertial sensors is proposed in this paper. First, scanning motion characteristics of a parachute-terminal-sensitive projectile are analyzed. Next, a high-precision parachute scanning platform attitude measurement device is designed to obtain the data of magnetic and inertial sensors. Then the extended Kalman filter is used to filter and observe errors. The scanning angle, the scanning angle velocity, the falling velocity, and the 2D scanning attitude are obtained. Finally, the accuracy and feasibility of the algorithm are analyzed and validated by MATLAB simulation, semi-physical simulation, and airdrop experiments. The presented research results can provide helpful references for the design and analysis of parachute scanning platforms, which can reduce development time and cost.


Author(s):  
Trenton Colton ◽  
Joseph Liechty ◽  
Alden McLean ◽  
Nathan Crane

Understanding the equilibrium saturation level is crucial to Binder Jetting (BJ). Saturation level influences dimensional accuracy, print time, green strength, and final material properties. Improved understanding of the saturation level can reduce development time for new materials and improve existing processes in BJ. Attempts have been made to predict saturation levels of parts with simple calculations from droplet primitives and capillary pressure. There is, however, limited experimental validation for these methods and they do not include the impact of drop velocity and droplet spacing. This study incorporates the influences of drop velocity and droplet spacing on the saturation level of the part. Drop primitives of varying droplet velocity and droplet spacing were compared. Results show that velocity impacts the feasible parameter space.


2021 ◽  
Vol 268 ◽  
pp. 01058
Author(s):  
Ling Li ◽  
Lingguo Meng ◽  
Fuxun Wang

Frequency divider circuit is the basic circuit in digital logic circuit. The circuit function is to divide or drop the frequency of the high frequency signal to get the lower frequency signal for a given frequency signal by division. On the Multisim software platform, using different design methods, as the foundation of middle scale integration chip 74LS161, design even frequency divider, odd frequency divider circuit and (N- 0.5) frequency divider circuit respectively. Each circuit design principle and method is illustrated and simulated. The results showed that the design is correct and conform to the proposed requirement. Experimental teaching applications based on Multisim software can improve design efficiency and reduce development time of design systems.


2021 ◽  
Vol 16 (2) ◽  
pp. 15-27
Author(s):  
Patrik Harnoš ◽  
◽  
Ľubomír Dedera ◽  

Use of an appropriate DSL can significantly reduce development time. This is due to the fact that DSLs are limited to the use of terms relating to the explicit domain, which makes them much easier for programmers to understand and learn. Despite these and other advantages of DSLs over GPLs, programmers will only exceptionally turn to DSLs in development process. Therefore, in this article, we will look closer on what DSLs are, when it is appropriate to use them in a project and when not. In the last part of this article, we will focus on the possibilities of using DSLs in the field of information security.


2021 ◽  
pp. 423-442
Author(s):  
Jasper Denkers ◽  
Marvin Brunner ◽  
Louis van Gool ◽  
Eelco Visser

AbstractWithin the printing industry, much of the variety in printed applications comes from the variety in finishing. Finishing comprises the processing of sheets of paper after being printed, e.g. to form books. The configuration space of finishers, i.e. all possible configurations given the available features and hardware capabilities, are large. Current control software minimally assists operators in finding useful configurations. Using a classical modelling and integration approach to support a variety of configuration spaces is suboptimal with respect to operatability, development time, and maintenance burden.In this paper, we explore the use of a modeling language for finishers to realize optimizing decision making over configuration parameters in a systematic way and to reduce development time by generating control software from models.We present CSX, a domain-specific language for high-level declarative specification of finishers that supports specification of the configuration parameters and the automated exploration of the configuration space of finishers. The language serves as an interface to constraint solving, i.e., we use low-level SMT constraint solving to find configurations for high-level specifications. We present a denotational semantics that expresses a translation of CSX specifications to SMT constraints. We describe the implementation of the CSX compiler and the CSX programming environment (IDE), which supports well-formedness checking, inhabitance checking, and interactive configuration space exploration. We evaluate CSX by modelling two realistic finishers. Benchmarks show that CSX has practical performance (<1s) for several scenarios of configuration space exploration.


2020 ◽  
Author(s):  
A.K. Friesen

The article presents the practice of using system methods in the development of a universal four-axle locomotive platform. The work is aimed at developing the optimal design of the frame and bodies of the locomotive, the choice of power and traction components to simplify the design process, reduce development time and reduce the cost of the product. The advantages of applying a systematic approach to working with requirements, determining the necessary functions and forming the structure of the product are described. Keywords: locomotive, frame, life cycle, system engineering, requirements, modularity, universal platform, shortening the development time.


2019 ◽  
Vol 08 (02) ◽  
pp. 1950003 ◽  
Author(s):  
G. W. Schoonderbeek ◽  
A. Szomoru ◽  
A. W. Gunst ◽  
L. Hiemstra ◽  
J. Hargreaves

With the ever-increasing data rates in radio astronomy, a universal Field Programmable Gate Array (FPGA)-based hardware platform which can be used at different locations in the signal processing chain, like a beamformer, data router or correlator, would reduce development time significantly. In this paper, we present the design of such a platform, the UniBoard2. With UniBoard2, both large rack-based and single-board systems can be made. Standard Quad Small Form-factor Pluggable (QSFP) input and output (IO) interfaces on the front side make it easy to interface UniBoard2 to standard 40 Gigabit Ethernet (GbE) network equipment. Hardware design challenges, like transceiver links, power supplies, power dissipation and cooling are described. The paper concludes with some examples of systems (like beamformers and correlators) that can be built using the UniBoard2 hardware platform.


2018 ◽  
Vol 8 (8) ◽  
pp. 1351 ◽  
Author(s):  
Duong Tran ◽  
Sajib Chakraborty ◽  
Yuanfeng Lan ◽  
Joeri Van Mierlo ◽  
Omar Hegazy

DC/DC Multiport Converters (MPC) are gaining interest in the hybrid electric drivetrains (i.e., vehicles or machines), where multiple sources are combined to enhance their capabilities and performances in terms of efficiency, integrated design and reliability. This hybridization will lead to more complexity and high development/design time. Therefore, a proper design approach is needed to optimize the design of the MPC as well as its performance and to reduce development time. In this research article, a new design methodology based on a Multi-Objective Genetic Algorithm (MOGA) for non-isolated interleaved MPCs is developed to minimize the weight, losses and input current ripples that have a significant impact on the lifetime of the energy sources. The inductor parameters obtained from the optimization framework is verified by the Finite Element Method (FEM) COMSOL software, which shows that inductor weight of optimized design is lower than that of the conventional design. The comparison of input current ripples and losses distribution between optimized and conventional designs are also analyzed in detailed, which validates the perspective of the proposed optimization method, taking into account emerging technologies such as wide bandgap semiconductors (SiC, GaN).


2018 ◽  
Vol 51 (1) ◽  
pp. 210-218 ◽  
Author(s):  
Alan A. Coelho

TOPASand its academic variantTOPAS-Academicare nonlinear least-squares optimization programs written in the C++ programming language. This paper describes their functionality and architecture. The latter is of benefit to developers seeking to reduce development time.TOPASallows linear and nonlinear constraints through the use of computer algebra, with parameter dependencies, required for parameter derivatives, automatically determined. In addition, the objective function can include restraints and penalties, which again are defined using computer algebra. Of importance is a conjugate gradient solution routine with bounding constraints which guide refinements to convergence. Much of the functionality ofTOPASis achieved through the use of generic functionality; for example, flexible peak-shape generation allows neutron time-of-flight (TOF) peak shapes to be described using generic functions. The kernel ofTOPAScan be run from the command line for batch mode operation or from a closely integrated graphical user interface. The functionality ofTOPASincludes peak fitting, Pawley and Le Bail refinement, Rietveld refinement, single-crystal refinement, pair distribution function refinement, magnetic structures, constant wavelength neutron refinement, TOF refinement, stacking-fault analysis, Laue refinement, indexing, charge flipping, and structure solution through simulated annealing.


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