Electric Field-Induced Magnetization Reversal of Multiferroic Nanomagnet

Using the inverse piezoelectric effect and inverse magnetostrictive effect in a multiferroic heterojunction, an electric field is able to control the magnetization switching of a uniaxial nanomagnet. Compared with traditional spintronic devices based on magnetic field, multiferroic nanomagnet devices have the advantages of ultra-low consumption and high radiation resistance, showing great application potential in modern high-integrated circuits and military electronic systems. However, the difficulties of electric field control of complete magnetization reversal of the nanomagnet and nanomagnet arrays in a nanomagnetic logic gate still restrict the developments of multiferroic nanomagnet device. In this chapter, the uniaxial nanomagnets in multiferroic heterojunctions are mainly discussed. The two core problems of the electric field control of nanomagnets and nanomagnetic logic gate are well solved.

Novel implementation of 3D multiplexers in nano magnetic logic technology

Purpose Owing to recent challenges of CMOS manufacturing and power consumption in silicon technologies among alternative technologies, Nanomagnetic logic (NML) is one of the most promising technologies, so it was selected for this study. NML is non-volatile with ultra-low power dissipation that operates at room temperature. This paper aims to propose novel implementation of 2% and 4% multiplexers (MUXs) in NML technology. Design/methodology/approach The proposed multiplexers in NML technology are verified by HDL-based simulators. In addition, this study estimated area and power dissipation of the proposed design to compare and approve the promising improvements in comparison to other similar NML implementations. Findings The results show the remarkable improvements in terms of APDP term in comparison to the recent proposed MUXs in NML technology which are reported in Table 2. The proposed implementation of the MUX in NML is designed in three-dimensional layout to improve interconnection complexity which is an integration challenge. Also, by facilitating the routing signals and total wire length needed for clock signals, the negative impact of the power dissipated in clock wires is improved. Originality/value These findings would appeal to a broad audience, such as the readership of Microelectronics International Journal. The authors confirm that this work is original and has not been published elsewhere nor is it currently under consideration for publication elsewhere. All authors have approved the paper and agreed with submission to Microelectronics International Journal. The authors have read and have abided by the statement of ethical standards for manuscripts submitted to Microelectronics International Journal. The authors have no conflict of interest to declare.