Modeling and performance analysis of high-speed, low-power InAs nanowire field-effect transistors

2010 ◽  
Vol 7 (10) ◽  
pp. 2514-2517
Author(s):  
M. Abul Khayer ◽  
Roger K. Lake
Keyword(s):  
Performance Analysis ◽  
Low Power ◽  
Field Effect ◽  
High Speed ◽  
Field Effect Transistors ◽  
And Performance

Comparative Performance Analysis of Nanowire and Nanotube Field Effect Transistors

2021 ◽  
pp. 54-70
Author(s):  
Raj Kumar ◽  
Shashi Bala ◽  
Arvind Kumar
Keyword(s):  
Performance Analysis ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Ballistic Transport ◽  
High Mobility ◽  
Short Channel Effects ◽  
Short Channel ◽  
Comparative Performance ◽  
Channel Effects ◽  
And Performance

To have enhanced drive current and diminish short channel effects, planer MOS transistors have migrated from single-gate devices to three-dimensional multi-gate MOSFETs. The gate-all-around nanowire field-effect transistor (GAA NWFET) and nanotube or double gate-all-around field-effect transistors (DGGA-NTFET) have been proposed to deal with short channel effects and performance relates issues. Nanowire and nanotube-based field-effect transistors can be considered as leading candidates for nanoscale devices due to their superior electrostatic controllability, and ballistic transport properties. In this work, the performance of GAA NWFETs and DGAA-NT FETs will be analyzed and compared. III-V semiconductor materials as a channel will also be employed due to their high mobility over silicon. Performance analysis of junctionless nanowire and nanotube FETs will also be compared and presented.

Effects of dual-spacer dielectrics on low-power and high-speed performance of sub-10 nm tunneling field-effect transistors

2016 ◽  
Vol 55 (6S1) ◽  
pp. 06GG02 ◽  
Author(s):  
Young Jun Yoon ◽  
Jae Hwa Seo ◽  
Seongjae Cho ◽  
Hyuck-In Kwon ◽  
Jung-Hee Lee ◽  
...  
Keyword(s):  
Low Power ◽  
Field Effect ◽  
High Speed ◽  
Field Effect Transistors ◽  
Tunneling Field Effect Transistors ◽  
Speed Performance

scholarly journals Design and Performance Analysis of Low Power High Speed 4x4 CNTFET Binary Content Addressable Memory Array

2019 ◽  
Vol 9 (1) ◽  
pp. 5962-5965
Keyword(s):  
Performance Analysis ◽  
Low Power ◽  
High Speed ◽  
Peak Power ◽  
Average Power ◽  
Complementary Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Content Addressable Memory ◽  
Power Peak ◽  
And Performance

In this paper, Carbon Nanotube Field Effect Transistor (CNTFET) based Binary Content Addressable Memory (BCAM) array is presented. The CAM array comprises of address decoders, encoders, data drivers and BCAM cells. Performance analysis is carried for 4X4 BCAM array. Each BCAM cell is designed based on adiabatic logic with optimum CNTFET parameter for low power and high speed applications. The performance of proposed BCAM array is analyzed for average power, peak power and search delay. The proposed CNTFET based BCAM array show improvement in the performance compared to that of complementary metal oxide semiconductor (CMOS) based BCAM array. The average power and peak power of the proposed 4x4 CNTFET BCAM array are in the range of micro watt (µW) while it is in the range of milli watt (mW) for CMOS based BCAM array. The search delay of the proposed 4X4 CNTFET BCAM array is improved by 32.3% compared to that of CMOS based BCAM array. All simulations are conducted for both CNTFET and CMOS based BCAM cells, BCAM array in HSPICE at 32 nm technology.

scholarly journals Implementation of 20 nm Graphene Channel Field Effect Transistors Using Silvaco TCAD Tool to Improve Short Channel Effects over Conventional MOSFETs

2021 ◽  
Vol 7 (1) ◽  
pp. 18-29
Author(s):  
Vinod Pralhad Tayade ◽  
Swapnil Laxman Lahudkar
Keyword(s):  
Low Power ◽  
Field Effect ◽  
High Speed ◽  
Field Effect Transistors ◽  
Oxide Semiconductor ◽  
Short Channel Effects ◽  
Short Channel ◽  
Channel Effects ◽  
20 Nm ◽  
Graphene Material

In recent years, demands for high speed and low power circuits have been raised. As conventional metal oxide semiconductor field effect transistors (MOSFETs) are unable to satisfy the demands due to short channel effects, the purpose of the study is to design an alternative of MOSFETs. Graphene FETs are one of the alternatives of MOSFETs due to the excellent properties of graphene material. In this work, a user-defined graphene material is defined, and a graphene channel FET is implemented using the Silvaco technology computer-aided design (TCAD) tool at 100 nm and scaled to 20 nm channel length. A silicon channel MOSFET is also implemented to compare the performance. The results show the improvement in subthreshold slope (SS) = 114 mV/dec, ION/IOFF ratio = 14379, and drain induced barrier lowering (DIBL) = 123 mV/V. It is concluded that graphene FETs are suitable candidates for low power applications.

High-Speed Low-Power Ring Oscillator Using Inverted-Structure Modulation-Doped GaAs/n-AlGaAs Field-Effect Transistors

1985 ◽  
Vol 24 (Part 1, No. 8) ◽  
pp. 1061-1064 ◽  
Author(s):  
Haruhisa Kinoshita ◽  
Seiji Nishi ◽  
Masahiro Akiyama ◽  
Katsuzo Kaminishi
Keyword(s):  
Low Power ◽  
Field Effect ◽  
High Speed ◽  
Field Effect Transistors ◽  
Ring Oscillator ◽  
Inverted Structure ◽  
Structure Modulation

Comparative Performance Analysis of Multi Gate Tunnel Field Effect Transistors

2016 ◽  
Vol 41 ◽  
pp. 1-8 ◽  
Author(s):  
T.S. Arun Samuel ◽  
M. Karthigai Pandian
Keyword(s):  
Performance Analysis ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Drain Current ◽  
Analytical Models ◽  
Comparative Performance ◽  
Novel Device ◽  
Device Structures ◽  
And Performance ◽  
Dual Material

In this paper, analytical modelling and performance analysis of novel device structures such as single gate SOI Tunnel Field Effect transistor (SG SOI TFET), Dual-Material Gate TFET (DMG TFET) and Dual Material Double Gate TFET (DMDG TFET) are proposed. The performance of the three devices is studied and compared in terms of surface potential, electric field and drain current. The DMDG TFET shows better performance in suppressing leakage current and enhancing ION current than the SG SOI TFET and DMG TFET. The analytical models of the devices are found to be in good agreement with the results obtained using two-dimensional TCAD device simulator.

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