An Analytical MOS Transistor Model Valid in All Regions of Operation and Dedicated to Low-Voltage and Low-Current Applications

1995 ◽  
pp. 83-114 ◽  
Author(s):  
Christian C. Enz ◽  
François Krummenacher ◽  
Eric A. Vittoz
Keyword(s):  
Low Voltage ◽  
Mos Transistor ◽  
Transistor Model

REL-MOS—A Reliability-Aware MOS Transistor Model

2019 ◽  
Vol 66 (1) ◽  
pp. 60-65 ◽  
Author(s):  
Theodor Hillebrand ◽  
Steffen Paul ◽  
Dagmar Peters-Drolshagen
Keyword(s):  
Mos Transistor ◽  
Transistor Model

A MOS Transistor Model for Mixed Analog-digital Circuit Design and Simulation

2006 ◽  
pp. 49-95 ◽  
Author(s):  
Matthias Bucher ◽  
Christophe Lallement ◽  
François Krummenacher ◽  
Christian Enz
Keyword(s):  
Circuit Design ◽  
Digital Circuit ◽  
Mos Transistor ◽  
Digital Circuit Design ◽  
Transistor Model

Effective Circuit Design Methodologies for Standby Leakage Power Reduction

2020 ◽  
Vol 12 (2) ◽  
pp. 168-172
Author(s):  
Manish Kumar ◽  
Md. Anwar Hussain ◽  
Sajal K. Paul
Keyword(s):  
Circuit Design ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Logic Circuits ◽  
Power Reduction ◽  
Leakage Power ◽  
Model Parameters ◽  
Mos Transistor ◽  
Design Methodologies ◽  
Transistor Model

This paper presents circuit level design methodologies for significantly reducing the standby leakage power. Layout of different CMOS logic circuits such as a 2-input XOR, a 2-input XNOR, and a 4-input XNOR are designed and simulated by using BSIM4 MOS transistor model parameters. Layout simulations are done at a supply voltage of 0.4 V in 45 nm CMOS technology. Logic circuits designed by using the proposed circuit design methodologies proved to be effective in minimizing the standby leakage power. All layout design and simulation of the circuits are carried out by using Microwind EDA software (version 3.1).

Performance of a Simple Highly-Linear MOS Analog Mixer

1997 ◽  
Vol 07 (05) ◽  
pp. 495-504 ◽  
Author(s):  
Kin Chung Mak ◽  
Howard Cam Luong
Keyword(s):  
Power Supply ◽  
Low Voltage ◽  
Mos Transistor ◽  
The Core ◽  
Saturation Region ◽  
Input Range ◽  
Region Theory

A low-voltage MOS analog mixer using a cross-coupled pair as the core is described. The mixing operation is based on the square-law characteristic of MOS transistor operating in the saturation region. Theory, simulation and measurement show that the mixing characteristic is superior and not sensitive to device mismatches. The realized mixer achieved a DC nonlinearity of less than 0.7% experimentally within an input range of 0.6 Vp-p. The measured IM3 and IMFDR3 are 22.5 dBm and -46.7 dB respectively. It consumes 2 mW power from a single 3.3 V power supply. The active die area is 200 μm × 150 μm.

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