Effect of the Polymeric Substrate Temperature on the Adhesion and Morphology of Metal Layers

1992 ◽  
pp. 303-318 ◽  
Author(s):  
Katsuhiko Nakamae ◽  
Satoshi Tanigawa ◽  
Katsuya Yamaguchi
1998 ◽  
Vol 555 ◽  
Author(s):  
F. Hamelmann ◽  
G. Haindl ◽  
A. Klipp ◽  
E. Majkova ◽  
U. Kleineberg ◽  
...  

AbstractW/Si and Mo/Si multilayers with 20 periods (doublelayer spacing d = 24nm) were deposited on silicon substrates using (remote-) plasma-enhanced MOCVD. The substrate temperature was below 200°C, which is necessary to avoid interdiffusion of the layers. The layer thickness and growth was controlled by an in situ soft x-ray reflectivity measurement. The characterisation of the multilayers showed an excellent growth of the silicon layers, while the metal layers are rough with embedded crystallites.


Author(s):  
M G. Norton ◽  
E.S. Hellman ◽  
E.H. Hartford ◽  
C.B. Carter

The bismuthates (for example, Ba1-xKxBiO3) represent a class of high transition temperature superconductors. The lack of anisotropy and the long coherence length of the bismuthates makes them technologically interesting for superconductor device applications. To obtain (100) oriented Ba1-xKxBiO3 films on (100) oriented MgO, a two-stage deposition process is utilized. In the first stage the films are nucleated at higher substrate temperatures, without the potassium. This process appears to facilitate the formation of the perovskite (100) orientation on (100) MgO. This nucleation layer is typically between 10 and 50 nm thick. In the second stage, the substrate temperature is reduced and the Ba1-xKxBiO3 is grown. Continued growth of (100) oriented material is possible at the lower substrate temperature.


Author(s):  
J. T. Woodward ◽  
J. A. N. Zasadzinski

The Scanning Tunneling Microscope (STM) offers exciting new ways of imaging surfaces of biological or organic materials with resolution to the sub-molecular scale. Rigid, conductive surfaces can readily be imaged with the STM with atomic resolution. Unfortunately, organic surfaces are neither sufficiently conductive or rigid enough to be examined directly with the STM. At present, nonconductive surfaces can be examined in two ways: 1) Using the AFM, which measures the deflection of a weak spring as it is dragged across the surface, or 2) coating or replicating non-conductive surfaces with metal layers so as to make them conductive, then imaging with the STM. However, we have found that the conventional freeze-fracture technique, while extremely useful for imaging bulk organic materials with STM, must be modified considerably for optimal use in the STM.


2002 ◽  
Vol 715 ◽  
Author(s):  
Keda Wang ◽  
Haoyue Zhang ◽  
Jian Zhang ◽  
Jessica M. Owens ◽  
Jennifer Weinberg-Wolf ◽  
...  

Abstracta-Si:H films were prepared by hot wire chemical vapor deposition. One group was deposited at a substrate temperature of Ts=250°C with varied hydrogen-dilution ratio, 0<R<10; the other group was deposited with fixed R=3 but a varied Ts from 150 to 550°C. IR, Raman and PL spectra were studied. The Raman results indicate that there is a threshold value for the microstructure transition from a- to μc-Si. The threshold is found to be R ≈ 2 at Ts = 250°C and Ts ≈ 200°C at R=3. The IR absorption of Si-H at 640 cm-1 was used to calculate the hydrogen content, CH. CH decreased monotonically when either R or Ts increased. The Si-H stretching mode contains two peaks at 2000 and 2090 cm-1. The ratio of the integral absorption peaks I2090/(I2090+I2090) showed a sudden increase at the threshold of microcrystallinity. At the same threshold, the PL features also indicate a sudden change from a- to μc-Si., i.e. the low energy PL band becomes dominant and the PL total intensity decreases. We attribute the above IR and PL changes to the contribution of microcrystallinity, especially the c-Si gain-boundaries.


Author(s):  
Romain Desplats ◽  
Timothee Dargnies ◽  
Jean-Christophe Courrege ◽  
Philippe Perdu ◽  
Jean-Louis Noullet

Abstract Focused Ion Beam (FIB) tools are widely used for Integrated Circuit (IC) debug and repair. With the increasing density of recent semiconductor devices, FIB operations are increasingly challenged, requiring access through 4 or more metal layers to reach a metal line of interest. In some cases, accessibility from the front side, through these metal layers, is so limited that backside FIB operations appear to be the most appropriate approach. The questions to be resolved before starting frontside or backside FIB operations on a device are: 1. Is it do-able, are the metal lines accessible? 2. What is the optimal positioning (e.g. accessing a metal 2 line is much faster and easier than digging down to a metal 6 line)? (for the backside) 3. What risk, time and cost are involved in FIB operations? In this paper, we will present a new approach, which allows the FIB user or designer to calculate the optimal FIB operation for debug and IC repair. It automatically selects the fastest and easiest milling and deposition FIB operations.


Author(s):  
H.H. Yap ◽  
P.K. Tan ◽  
G.R. Low ◽  
M.K. Dawood ◽  
H. Feng ◽  
...  

Abstract With technology scaling of semiconductor devices and further growth of the integrated circuit (IC) design and function complexity, it is necessary to increase the number of transistors in IC’s chip, layer stacks, and process steps. The last few metal layers of Back End Of Line (BEOL) are usually very thick metal lines (&gt;4μm thickness) and protected with hard Silicon Dioxide (SiO2) material that is formed from (TetraEthyl OrthoSilicate) TEOS as Inter-Metal Dielectric (IMD). In order to perform physical failure analysis (PFA) on the logic or memory, the top thick metal layers must be removed. It is time-consuming to deprocess those thick metal and IMD layers using conventional PFA workflows. In this paper, the Fast Laser Deprocessing Technique (FLDT) is proposed to remove the BEOL thick and stubborn metal layers for memory PFA. The proposed FLDT is a cost-effective and quick way to deprocess a sample for defect identification in PFA.


Author(s):  
P. Egger ◽  
C. Burmer

Abstract The area of embedded SRAMs in advanced logic ICs is increasing more and more. On the other hand smaller structure sizes and an increasing number of metal layers make conventional failure localization by using emission microscopy or liquid crystal inefficient. In this paper a SRAM failure analysis strategy will be presented independent on layout and technology.


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