Automatic Determination of Optimal FIB Operations for Improved Circuit Probing and Fast Reconfiguration

Author(s):  
Romain Desplats ◽  
Timothee Dargnies ◽  
Jean-Christophe Courrege ◽  
Philippe Perdu ◽  
Jean-Louis Noullet

Abstract Focused Ion Beam (FIB) tools are widely used for Integrated Circuit (IC) debug and repair. With the increasing density of recent semiconductor devices, FIB operations are increasingly challenged, requiring access through 4 or more metal layers to reach a metal line of interest. In some cases, accessibility from the front side, through these metal layers, is so limited that backside FIB operations appear to be the most appropriate approach. The questions to be resolved before starting frontside or backside FIB operations on a device are: 1. Is it do-able, are the metal lines accessible? 2. What is the optimal positioning (e.g. accessing a metal 2 line is much faster and easier than digging down to a metal 6 line)? (for the backside) 3. What risk, time and cost are involved in FIB operations? In this paper, we will present a new approach, which allows the FIB user or designer to calculate the optimal FIB operation for debug and IC repair. It automatically selects the fastest and easiest milling and deposition FIB operations.

1990 ◽  
Vol 199 ◽  
Author(s):  
Kyung-ho Park

ABSTRACTA procedure for preparing cross-sectional TEM specimens by focused ion beam etching (FIB) of specific regions on an integrated circuit chip is outlined. The investigation of the morphology, structure and local chemistry of precisely selected regions of semiconductor devices becomes increasingly important since the lateral dimensions and layer thickness of device structures are continually being reduced. The standard technique of preparing specimens for TEM, whether planar or cross-sectional, cannot select particular small regions. Some techniques and a number of tools and fixtures have been proposed which allow us to prepare TEM specimen of prespecified locations in complex devices. Most of these techniques, however, are still very difficult, tedious process and time consuming.A new technique has been proposed recently involving the use of FIB. The technique ensures that the preselected area of submicron scale will be located in the electron transparent section used for TEM imaging, in preparation turn-around time of about two hours. The TEM imaging of specific contacts via hole in a VLSI chip is illustrated.


2012 ◽  
Vol 20 (5) ◽  
pp. 38-44 ◽  
Author(s):  
Koji Inoue ◽  
Ajay Kumar Kambham ◽  
Dominique Mangelinck ◽  
Dan Lawrence ◽  
David J. Larson

The development of laser-assisted atom probe tomography (APT) and specimen preparation techniques using a focused ion beam equipped with high-resolution scanning electron microscopy (SEM) has significantly advanced the characterization of semiconductor devices by APT. The capability of APT to map out elements in devices at the atomic scale with high sensitivity meets the characterization requirements of semiconductor devices such as the determination of elemental distributions for each device region.


2018 ◽  
Author(s):  
Steve Wang ◽  
Jim McGinn ◽  
Peter Tvarozek ◽  
Amir Weiss

Abstract Secondary electron detector (SED) plays a vital role in a focused ion beam (FIB) system. A successful circuit edit requires a good effective detector. Novel approach is presented in this paper to improve the performance of such a detector, making circuit altering for the most advanced integrated circuit (IC) possible.


Author(s):  
Ching Shan Sung ◽  
Hsiu Ting Lee ◽  
Jian Shing Luo

Abstract Transmission electron microscopy (TEM) plays an important role in the structural analysis and characterization of materials for process evaluation and failure analysis in the integrated circuit (IC) industry as device shrinkage continues. It is well known that a high quality TEM sample is one of the keys which enables to facilitate successful TEM analysis. This paper demonstrates a few examples to show the tricks on positioning, protection deposition, sample dicing, and focused ion beam milling of the TEM sample preparation for advanced DRAMs. The micro-structures of the devices and samples architectures were observed by using cross sectional transmission electron microscopy, scanning electron microscopy, and optical microscopy. Following these tricks can help readers to prepare TEM samples with higher quality and efficiency.


Author(s):  
Chin Kai Liu ◽  
Chi Jen. Chen ◽  
Jeh Yan.Chiou ◽  
David Su

Abstract Focused ion beam (FIB) has become a useful tool in the Integrated Circuit (IC) industry, It is playing an important role in Failure Analysis (FA), circuit repair and Transmission Electron Microscopy (TEM) specimen preparation. In particular, preparation of TEM samples using FIB has become popular within the last ten years [1]; the progress in this field is well documented. Given the usefulness of FIB, “Artifact” however is a very sensitive issue in TEM inspections. The ability to identify those artifacts in TEM analysis is an important as to understanding the significance of pictures In this paper, we will describe how to measure the damages introduced by FIB sample preparation and introduce a better way to prevent such kind of artifacts.


Author(s):  
Hui Pan ◽  
Thomas Gibson

Abstract In recent years, there have been many advances in the equipment and techniques used to isolate faults. There are many options available to the failure analyst. The available techniques fall into the categories of electrical, photonic, thermal and electron/ion beam [1]. Each technique has its advantages and its limitations. In this paper, we introduce a case of successful failure analysis using a combination of several fault localization techniques on a 0.15um CMOS device with seven layers of metal. It includes electrical failure mode characterization, front side photoemission, backside photoemission, Focused Ion Beam (FIB), Scanning Electron Microscope (SEM) and liquid crystal. Electrical characterization along with backside photoemission proved most useful in this case as a poly short problem was found to be causing a charge pump failure. A specific type of layout, often referred to as a hammerhead layout, and the use of Optical Proximity Correction (OPC) contributed to the poly level shorts.


Author(s):  
K. N. Hooghan ◽  
K. S. Wills ◽  
P.A. Rodriguez ◽  
S.J. O’Connell

Abstract Device repair using Focused Ion Beam(FIB) systems has been in use for most of the last decade. Most of this has been done by people who have been essentially self-taught. The result has been a long learning curve to become proficient in device repair. Since a great deal of the problem is that documentation on this “art form” is found in papers from many different disciplines, this work attempts to summarize all of the available information under one title. The primary focus of FIB device repair is to ensure and maintain device integrity and subsequently retain market share while optimizing the use of the instrument, usually referred to as ‘beam time’. We describe and discuss several methods of optimizing beam time. First, beam time should be minimized while doing on chip navigation to reach the target areas. Several different approaches are discussed: dead reckoning, 3-point alignment, CAD-based navigation, and optical overlay. Second, after the repair areas are located and identified, the desired metal levels must be reached using a combination of beam currents and gas chemistries, and then filled up and strapped to make final connections. Third, cuts and cleanups must be performed as required for the final repair. We will discuss typical values of the beam currents required to maintain device integrity while concurrently optimizing repair time. Maintaining device integrity is difficult because of two potentially serious interactions of the FIB on the substrate: 1) since the beam consists of heavy metal ions (typically Gallium) the act of imaging the surface produces some physical damage; 2) the beam is positively charged and puts some charge into the substrate, making it necessary to use great care working in and around capacitors or active areas such as transistors, in order to avoid changing the threshold voltage of the devices. Strategies for minimizing potential damage and maximizing quality and throughput will be discussed.


1991 ◽  
Vol 30 (Part 1, No. 11B) ◽  
pp. 3246-3249 ◽  
Author(s):  
Nobuyoshi Koshida ◽  
Kazuyoshi Yoshida ◽  
Shinichi Watanuki ◽  
Masanori Komuro ◽  
Nobufumi Atoda
Keyword(s):  
Ion Beam ◽  

Author(s):  
C.S. Bonifacio ◽  
P. Nowakowski ◽  
R. Li ◽  
M.L. Ray ◽  
P.E. Fischione ◽  
...  

Abstract Fast and accurate examination from the bulk to the specific area of the defect in advanced semiconductor devices is critical in failure analysis. This work presents the use of Ar ion milling methods in combination with Ga focused ion beam (FIB) milling as a cutting-edge sample preparation technique from the bulk to specific areas by FIB lift-out without sample-preparation-induced artifacts. The result is an accurately delayered sample from which electron-transparent TEM specimens of less than 15 nm are obtained.


1998 ◽  
Vol 4 (S2) ◽  
pp. 492-493 ◽  
Author(s):  
M.W. Phaneuf ◽  
J. Li ◽  
T. Malis

Focused Ion Beam or FIB systems have been used in integrated circuit production for some time. The ability to combine rapid, precision focused ion beam sputtering or gas-assisted ion etching with focused ion beam deposition allows for rapid-prototyping of circuit modifications and failure analysis of defects even if they are buried deep within the chip's architecture. Inevitably, creative TEM researchers reasoned that a FIB could be used to produce site specific parallel-sided, electron transparent regions, thus bringing about the rather unique situation wherein the specimen preparation device often was worth as much as the TEM itself.More recently, FIB manufacturers have concentrated on improving the resolution and imaging characteristics of these instruments, resulting in a more general-purpose characterization tool. The Micrion 2500 FIB system used in this study is capable of 4 nm imaging resolution using either secondary electron or secondary ions, both generated by a 50 kV liquid metal gallium ion source.


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