ULTRARAM™: a low-energy, high-endurance, compound-semiconductor memory on silicon

ULTRARAM is a non-volatile memory with the potential to achieve fast, ultralow-energy electron storage in a floating gate accessed through a triple-barrier resonant tunneling heterostructure. Here we report its implementation on a Si substrate; a vital step towards cost-effective mass production. Sample growth using molecular beam epitaxy commenced with deposition of an AlSb nucleation layer to seed the growth of a GaSb buffer layer, followed by the III-V memory epilayers. Fabricated single-cell memories show clear 0/1 logic-state contrast after ≤10-ms duration program/erase pulses of ~2.5 V, a remarkably fast switching speed for 10- and 20-µm devices. Furthermore, the combination of low voltage and small device capacitance per unit area results in a switching energy that is orders of magnitude lower than dynamic random access memory and flash, for a given cell size. Extended testing of devices revealed retention in excess of 1000 years, and degradation-free endurance of over 107 program/erase cycles, surpassing very recent results for similar devices on GaAs substrates.

Polarization isolation for GaN electronics

GaN electronics have hinged on invasive isolation such as mesa etching and ion implantation to define device geometry and reduce off-state leakage, which however suffer from damages hence potential leakage paths and complex processing. In this study, we propose a new paradigm of polarization isolation utilizing intrinsic electronic properties, realizing in-situ isolation during device epitaxy without the need of post-growth processing. Specifically, adjacent III- and N-polar AlGaN/GaN heterojunctions were grown simultaneously on the patterned AlN nucleation layer on c-plane sapphire substrates. The two-dimensional electron gas (2DEG) was formed at the III-polar regions but completely depleted in the N-polar regions, thereby isolating the 2DEG channels with a large 3.5 eV barrier as predicted by theoretical simulations. The polarization-isolated high electron mobility transistors (PI-HEMT) structures exhibited significantly reduced isolation leakage currents by up to nearly two orders of magnitude at 50 V voltage bias compared to the state-of-the-art results with various isolation spacing. Besides, record-high isolation breakdown voltage of 2628 V was demonstrated for the PI-HEMT structure with 3 µm isolation spacing. Moreover, the PI-HEMT device show low off-state leakage current of 2×10− 8 mA/mm with high Ion/Ioff ratio of 109 at VD=2 V and nearly ideal subthreshold slope of 61 mV/dec. This work demonstrates that the polarization isolation is highly promising for GaN electronics, in particular for high-density integration requiring precisely-defined patterns amid small device spacing.

ULTRARAM™: a low-energy, high-endurance, compound-semiconductor memory on silicon

ULTRARAM™ is a non-volatile memory with the potential to achieve fast, ultra-low-energy electron storage in a floating gate accessed through a triple-barrier resonant tunnelling heterostructure. Here we report the implementation of ULTRARAM™ on a Si substrate; a vital step towards cost-effective mass production. Sample growth was carried out using molecular beam epitaxy, by first depositing an AlSb nucleation layer to seed the growth of a GaSb buffer layer, followed by the III-V memory epilayers. Fabricated single-cell memories show clear 0/1 logic-state contrast after ≤10-ms duration program/erase pulses of ~2.5 V, a remarkably fast switching speed for 10- and 20-µm devices. Furthermore, the combination of low voltage and small device capacitance per unit area results in a switching energy that is orders of magnitude lower than dynamic random access memory and flash, for a given cell size. Extended testing of the devices revealed retention in excess of 1000 years and degradation-free endurance of over 107 program/erase cycles, exceeding very recent results for similar devices on GaAs substrates.

The role of growth temperature on the indium incorporation process for the MOCVD growth of InGaN/GaN heterostructures

Purpose The purpose of this paper is to investigate the effect of growth temperature on the evolution of indium incorporation and the growth process of InGaN/GaN heterostructures. Design/methodology/approach To examine this effect, the InGaN/GaN heterostructures were grown using Taiyo Nippon Sanso Corporation metal-organic chemical vapor deposition (MOCVD) SR4000-HT system. The InGaN/GaN heterostructures were epitaxially grown on 3.4 µm undoped-GaN (ud-GaN) and GaN nucleation layer, respectively, over a commercial 2” c-plane flat sapphire substrate. The InGaN layers were grown at different temperature settings ranging from 860°C to 820°C in a step of 20°C. The details of structural, surface morphology and optical properties were investigated using X-ray diffraction (XRD), field emission scanning electron microscope (FE-SEM), atomic force microscopy and ultraviolet-visible (UV-Vis) spectrophotometer, respectively. Findings InGaN/GaN heterostructure with indium composition up to 10.9% has been successfully grown using the MOCVD technique without any phase separation detected within the sensitivity of the instrument. Indium compositions were estimated through simulation fitting of the XRD curve and calculation of Vegard’s law from UV-Vis measurement. The thickness of the structures was determined using the Swanepoel method and the FE-SEM cross-section image. Originality/value This paper report on the effect of MOCVD growth temperature on the growth process of InGaN/GaN heterostructure, which is of interest in solid-state lighting technology, especially in light-emitting diodes and solar cell application.

Effect of nucleation layer thickness on reducing dislocation density in AlN layer for AlGaN-based UVC LED

Purpose The purpose of this study is to investigate the influence of AlN nucleation thickness in reducing the threading dislocations density in AlN layer grown on sapphire substrate. Design/methodology/approach In this work, the effect of the nucleation thickness at 5 nm, 10 nm and 20 nm on reducing the dislocation density in the overgrown AlN layer by metal organic chemical vapor deposition was discussed. The AlN layer without the nucleation layer was also included in this study for comparison. Findings By inserting the 10 nm thick nucleation layer, the density of the dislocation in the AlN layer can be as low as 9.0 × 108 cm−2. The surface of the AlN layer with that nucleation layer was smoother than its counterparts. Originality/value This manuscript discussed the influence of nucleation thickness and its possible mechanism in reducing dislocations density in the AlN layer on sapphire. The authors believe that the finding will be of interest to the readers of this journal, in particular those who are working on the area of AlN.

Fabrication and characterization of InN-based metal-semiconductor-metal infrared photodetectors prepared using sol–gel spin coated technique

We report on the growth and characterization of undoped indium nitride (InN) thin films grown on a silicon substrate. The InN thin films were grown on aluminium nitride (AlN) template with gallium nitride (GaN) nucleation layer using a relatively simple and low-cost sol–gel spin coating method. The crystalline structure and optical properties of the deposited films were investigated. X-ray diffraction and Raman results revealed that InN thin films with wurtzite structure were successfully grown. For InN thin film grown on a substrate with the GaN nucleation layer, its strain and dislocation density are lower than that of the substrate with the AlN nucleation layer. From the ultra-violet-visible diffuse reflectance spectrum analysis, the energy bandgap of the InN thin films with the GaN layer was 1.70 eV. The potential application of the sol–gel spin-coated InN thin films was also explored. Metal–semiconductor–metal (MSM) infrared (IR) photodetectors were fabricated by depositing the platinum contacts using two interdigitated electrodes metal mask on the samples. The finding shows that the device demonstrates good sensitivity and repeatability towards IR excitation at a wavelength of 808 nm. The photodetector characteristics at dark and photocurrent conditions such as Schottky barrier height (SBH) and ideality factor are determined. Upon exposure to the IR source at 3V applied bias, InN/AlN/Si device configuration displays rapid rise time of 0.85 s and decay time of 0.78 s, while InN/GaN/AlNSi demonstrates slow rise time of 7.45 s and decay time of 13.75 s.