Extracting Robust Keys from NAND Flash Physical Unclonable Functions

2015 ◽  
pp. 437-454 ◽  
Author(s):  
Shijie Jia ◽  
Luning Xia ◽  
Zhan Wang ◽  
Jingqiang Lin ◽  
Guozhu Zhang ◽  
...  
Keyword(s):  
Nand Flash ◽  
Physical Unclonable Functions

Novel Three Dimensional (3D) NAND Flash Memory Array Having Tied Bit-line and Ground Select Transistor (TiGer)

2012 ◽  
Vol E95.C (5) ◽  
pp. 837-841 ◽  
Author(s):  
Se Hwan PARK ◽  
Yoon KIM ◽  
Wandong KIM ◽  
Joo Yun SEO ◽  
Hyungjin KIM ◽  
...  
Keyword(s):  
Flash Memory ◽  
Three Dimensional ◽  
Nand Flash ◽  
Nand Flash Memory ◽  
Memory Array

Analysis on Hybrid SSD Configuration with Emerging Non-Volatile Memories Including Quadruple-Level Cell (QLC) NAND Flash Memory and Various Types of Storage Class Memories (SCMs)

2020 ◽  
Vol E103.C (4) ◽  
pp. 171-180
Author(s):  
Yoshiki TAKAI ◽  
Mamoru FUKUCHI ◽  
Chihiro MATSUI ◽  
Reika KINOSHITA ◽  
Ken TAKEUCHI
Keyword(s):  
Flash Memory ◽  
Nand Flash ◽  
Nand Flash Memory

Energy-Scalable 4KB LDPC Decoding Architecture for NAND-Flash-Based Storage Systems

2016 ◽  
Vol E99.C (2) ◽  
pp. 293-301 ◽  
Author(s):  
Youngjoo LEE ◽  
Jaehwan JUNG ◽  
In-Cheol PARK
Keyword(s):  
Storage Systems ◽  
Nand Flash ◽  
Ldpc Decoding

Realization of NAND FLASH Control Glueless Interface Circuit

2014 ◽  
Vol 1008-1009 ◽  
pp. 659-662
Author(s):  
Hai Ke Liu ◽  
Shun Wang ◽  
Xin Gna Kang ◽  
Jin Liang Wang
Keyword(s):  
Error Correction ◽  
Code Generation ◽  
Nand Flash ◽  
Timing Control ◽  
Interface Circuit ◽  
Advantages And Disadvantages ◽  
Operation Sequence ◽  
Control Interface

The article realization of NAND FLASH control glueless interface circuit based on FPGA,comparing the advantages and disadvantages of the NAND Flash and analysising the function of control interface circuit. The control interface circuit can correct carry out the SRAM timing-input block erase, page reads, page programming, state read instructions into the required operation sequence of NAND Flash, greatly simplifies the NAND FLASH read and write timing control. According to the ECC algorithm,the realization method of ECC check code generation,error search,error correction is described.The function of operate instructions of the NAND Flash control interface circuit designed in this paper is verified on Xillinx Spartan-3 board, and the frequency can reach 100MHz.

scholarly journals Artificial Neural Network Assisted Error Correction for MLC NAND Flash Memory

Micromachines ◽  
2021 ◽  
Vol 12 (8) ◽  
pp. 879
Author(s):  
Ruiquan He ◽  
Haihua Hu ◽  
Chunru Xiong ◽  
Guojun Han
Keyword(s):  
Neural Network ◽  
Error Correction ◽  
Error Detection ◽  
Flash Memory ◽  
Nand Flash ◽  
Data Reliability ◽  
Nand Flash Memory ◽  
Process Technology ◽  
Noise Mitigation ◽  
Memory Channel

The multilevel per cell technology and continued scaling down process technology significantly improves the storage density of NAND flash memory but also brings about a challenge in that data reliability degrades due to the serious noise. To ensure the data reliability, many noise mitigation technologies have been proposed. However, they only mitigate one of the noises of the NAND flash memory channel. In this paper, we consider all the main noises and present a novel neural network-assisted error correction (ANNAEC) scheme to increase the reliability of multi-level cell (MLC) NAND flash memory. To avoid using retention time as an input parameter of the neural network, we propose a relative log-likelihood ratio (LLR) to estimate the actual LLR. Then, we transform the bit detection into a clustering problem and propose to employ a neural network to learn the error characteristics of the NAND flash memory channel. Therefore, the trained neural network has optimized performances of bit error detection. Simulation results show that our proposed scheme can significantly improve the performance of the bit error detection and increase the endurance of NAND flash memory.

A Heavy-ion Beam Monitor Based on 3D NAND Flash Memories

2021 ◽  
pp. 1-1
Author(s):  
S. Gerardin ◽  
M. Bagatin ◽  
A. Paccagnella ◽  
S. Beltrami ◽  
A. Costantino ◽  
...  
Keyword(s):  
Ion Beam ◽  
Heavy Ion ◽  
Nand Flash ◽  
Flash Memories ◽  
Beam Monitor ◽  
Heavy Ion Beam

scholarly journals Remote Quantum-Safe Authentication of Entities with Physical Unclonable Functions

Photonics ◽  
2021 ◽  
Vol 8 (7) ◽  
pp. 289
Author(s):  
Georgios M. Nikolopoulos
Keyword(s):  
Authentication Protocol ◽  
Authentication Protocols ◽  
Photonic Networks ◽  
Physical Unclonable Functions ◽  
Quantum Protocols ◽  
Open Question ◽  
Standard Techniques

Physical unclonable functions have been shown to be a useful resource of randomness for implementing various cryptographic tasks including entity authentication. All the related entity authentication protocols that have been discussed in the literature so far, either they are vulnerable to an emulation attack, or they are limited to short distances. Hence, quantum-safe remote entity authentication over large distances remains an open question. In the first part of this work, we discuss the requirements that an entity authentication protocol has to offer, to be useful for remote entity authentication in practice. Subsequently, we propose a protocol, which can operate over large distances, and offers security against both classical and quantum adversaries. The proposed protocol relies on standard techniques, it is fully compatible with the infrastructure of existing and future photonic networks, and it can operate in parallel with other quantum protocols, including QKD protocols.

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